Move "select CACHE_AS_RAM" lines from boards into CPU socket.

[coreboot.git] / src / mainboard / asrock / 939a785gmh / Kconfig

diff --git a/src/mainboard/asrock/939a785gmh/Kconfig b/src/mainboard/asrock/939a785gmh/Kconfig
index 176c5d628880a4d79e3f71df0313ac67c8f83bb8..2d3092f56ffd20958288961ab442657e23a22634 100644 (file)
--- a/src/mainboard/asrock/939a785gmh/Kconfig
+++ b/src/mainboard/asrock/939a785gmh/Kconfig
@@ -11,18 +11,20 @@ config BOARD_SPECIFIC_OPTIONS # dummy
        select SOUTHBRIDGE_AMD_SB700
        select SUPERIO_WINBOND_W83627DHG
        select BOARD_HAS_FADT
-       select GENERATE_ACPI_TABLES
-       select GENERATE_MP_TABLE
-       select GENERATE_PIRQ_TABLE
+       select HAVE_ACPI_TABLES
+       select HAVE_MP_TABLE
+       select HAVE_PIRQ_TABLE
        select HAVE_MAINBOARD_RESOURCES
        select HAVE_OPTION_TABLE
        select HAVE_BUS_CONFIG
        select LIFT_BSP_APIC_ID
-       select USE_DCACHE_RAM
        select HAVE_HARD_RESET
        select SB_HT_CHAIN_UNITID_OFFSET_ONLY
        select BOARD_ROMSIZE_KB_1024
        select GFXUMA
+       select RAMINIT_SYSINFO
+       select QRANK_DIMM_SUPPORT
+       select SET_FIDVID
 
 config MAINBOARD_DIR
        string
@@ -48,10 +50,6 @@ config MAINBOARD_PART_NUMBER
        string
        default "939A785GMH"
 
-config HW_MEM_HOLE_SIZEK
-       hex
-       default 0x100000
-
 config MAX_CPUS
        int
        default 8
@@ -60,10 +58,6 @@ config MAX_PHYSICAL_CPUS
        int
        default 2
 
-config HW_MEM_HOLE_SIZE_AUTO_INC
-       bool
-       default n
-
 config SB_HT_CHAIN_ON_BUS0
        int
        default 1