Drop excessive whitespace randomly sprinkled in romstage.c files.
[coreboot.git] / src / mainboard / artecgroup / dbe61 / romstage.c
index 07fd54872226ab339baa4421b97236ed43d096ff..1cff578f1b0835f0f56aefa4c001bfd4b2d0b1d9 100644 (file)
 #include <arch/romcc_io.h>
 #include <arch/hlt.h>
 #include <stdlib.h>
-#include "pc80/serial.c"
-#include "console/console.c"
-#include "lib/ramtest.c"
+#include <console/console.h>
 #include "cpu/x86/bist.h"
 #include "cpu/x86/msr.h"
 #include <cpu/amd/lxdef.h>
 #include <cpu/amd/geode_post_code.h>
 #include "southbridge/amd/cs5536/cs5536.h"
 #include "spd_table.h"
-
+#include <spd.h>
 #include "southbridge/amd/cs5536/cs5536_early_smbus.c"
 #include "southbridge/amd/cs5536/cs5536_early_setup.c"
 
-#define DIMM0 0xA0
-#define DIMM1 0xA2
-
 static int spd_read_byte(unsigned device, unsigned address)
 {
        int i;
@@ -82,7 +77,7 @@ void main(unsigned long bist)
 
        msr_t msr;
        static const struct mem_controller memctrl[] = {
-               {.channel0 = {(0xa << 3) | 0, (0xa << 3) | 1}}
+               {.channel0 = {DIMM0, DIMM1}}
        };
 
        SystemPreInit();
@@ -110,7 +105,7 @@ void main(unsigned long bist)
 
        pll_reset(ManualConf);
 
-       cpuRegInit();
+       cpuRegInit(0, DIMM0, DIMM1, DRAM_TERMINATED);
 
        sdram_initialize(1, memctrl);
 
@@ -149,4 +144,3 @@ void main(unsigned long bist)
        // ram_check(0x00000000, 640 * 1024);
        // ram_check(1024 * 1024, 2 * 1024 * 1024);
 }
-