I need to do uses HAVE_ACPI_RESUME for each board. Here we go.

[coreboot.git] / src / mainboard / amd / serengeti_cheetah_fam10 / Options.lb

diff --git a/src/mainboard/amd/serengeti_cheetah_fam10/Options.lb b/src/mainboard/amd/serengeti_cheetah_fam10/Options.lb
index 1382aa2d55a69e150fb32719b0f42e35c0791948..e2963954fed5e4122fa566938aad6783e584fb4b 100644 (file)
--- a/src/mainboard/amd/serengeti_cheetah_fam10/Options.lb
+++ b/src/mainboard/amd/serengeti_cheetah_fam10/Options.lb
@@ -18,8 +18,10 @@
 #
 
 uses HAVE_MP_TABLE
+uses CONFIG_ROMFS
 uses HAVE_PIRQ_TABLE
 uses HAVE_ACPI_TABLES
+uses HAVE_ACPI_RESUME
 uses ACPI_SSDTX_NUM
 uses USE_FALLBACK_IMAGE
 uses USE_FAILOVER_IMAGE
@@ -75,7 +77,6 @@ uses CROSS_COMPILE
 uses CC
 uses HOSTCC
 uses OBJCOPY
-uses CONFIG_CHIP_NAME
 uses CONFIG_CONSOLE_VGA
 uses CONFIG_PCI_ROM_RUN
 uses HW_MEM_HOLE_SIZEK
@@ -114,6 +115,7 @@ uses CONFIG_AMDMCT
 
 uses CONFIG_USE_PRINTK_IN_CAR
 uses CAR_FAM10
+uses AMD_UCODE_PATCH_FILE
 
 ###
 ### Build options
@@ -195,9 +197,6 @@ default ENABLE_APIC_EXT_ID=1
 default APIC_ID_OFFSET=0x00
 default LIFT_BSP_APIC_ID=1
 
-#CHIP_NAME ?
-default CONFIG_CHIP_NAME=1
-
 #memory hole size, 0 mean disable, others will enable the hole, at that case if it is small than mmio_basek, it will use mmio_basek instead.
 #2G
 #default HW_MEM_HOLE_SIZEK=0x200000
@@ -260,6 +259,15 @@ default MAINBOARD_VENDOR="AMD"
 default MAINBOARD_PCI_SUBSYSTEM_VENDOR_ID=0x1022
 default MAINBOARD_PCI_SUBSYSTEM_DEVICE_ID=0x2b80
 
+##
+## Set microcode patch file name
+##
+##     Barcelona rev Ax:  "mc_patch_01000020.h"
+##     Barcelona rev B0, B1, BA: "mc_patch_01000084.h"
+##     Barcelona rev B2, B3: "mc_patch_01000083.h"
+##
+default AMD_UCODE_PATCH_FILE="mc_patch_01000083.h"
+
 ###
 ### coreboot layout values
 ###
@@ -356,4 +364,9 @@ default  MAXIMUM_CONSOLE_LOGLEVEL=8
 default MAINBOARD_POWER_ON_AFTER_POWER_FAIL="MAINBOARD_POWER_ON"
 
 ### End Options.lb
+#
+# ROMFS
+#
+#
+default CONFIG_ROMFS=0
 end