Update equivalent processor revision ID to load latest microcode patches and

[coreboot.git] / src / mainboard / amd / serengeti_cheetah_fam10 / Options.lb

diff --git a/src/mainboard/amd/serengeti_cheetah_fam10/Options.lb b/src/mainboard/amd/serengeti_cheetah_fam10/Options.lb
index 369af7621c2d5103e5ad54bcf951a1510252bc0a..80dff3a67a8df9b735d1f4bb1ef286b6f52d3e38 100644 (file)
--- a/src/mainboard/amd/serengeti_cheetah_fam10/Options.lb
+++ b/src/mainboard/amd/serengeti_cheetah_fam10/Options.lb
@@ -18,9 +18,10 @@
 #
 
 uses HAVE_MP_TABLE
-uses CONFIG_ROMFS
+uses CONFIG_CBFS
 uses HAVE_PIRQ_TABLE
 uses HAVE_ACPI_TABLES
+uses HAVE_ACPI_RESUME
 uses ACPI_SSDTX_NUM
 uses USE_FALLBACK_IMAGE
 uses USE_FAILOVER_IMAGE
@@ -135,7 +136,7 @@ default ROM_SIZE=524288
 #FALLBACK: 512K - 4K
 default FALLBACK_SIZE=0x7f000
 #FAILOVER: 4k
-default FAILOVER_SIZE=0x01000
+default FAILOVER_SIZE=0x02000
 
 #more 1M for pgtbl
 #if there is RAM on node0, we need to set it to 32M, otherwise can not access CAR on node0, and RAM on node1 at same time.
@@ -183,11 +184,10 @@ default LB_CKS_LOC=123
 
 ##
 ## Build code for SMP support
-## Only worry about 2 micro processors
 ##
 default CONFIG_SMP=1
-default CONFIG_MAX_PHYSICAL_CPUS=2
-default CONFIG_MAX_CPUS=4 * CONFIG_MAX_PHYSICAL_CPUS
+default CONFIG_MAX_PHYSICAL_CPUS=8
+default CONFIG_MAX_CPUS=6 * CONFIG_MAX_PHYSICAL_CPUS
 default CONFIG_LOGICAL_CPUS=1
 
 #default SERIAL_CPU_INIT=0
@@ -261,11 +261,12 @@ default MAINBOARD_PCI_SUBSYSTEM_DEVICE_ID=0x2b80
 ##
 ## Set microcode patch file name
 ##
-##     Barcelona rev Ax:  "mc_patch_01000020.h"
-##     Barcelona rev B0, B1, BA: "mc_patch_01000084.h"
-##     Barcelona rev B2, B3: "mc_patch_01000083.h"
+##     Barcelona rev DR-Ax:  "mc_patch_01000020.h"
+##     Barcelona rev DR-B0, B1, BA: "mc_patch_01000096.h"
+##     Barcelona rev DR-B2, B3: "mc_patch_01000095.h"
+##     Shanghai rev DA-C2: "mc_patch_0100009f.h"
 ##
-default AMD_UCODE_PATCH_FILE="mc_patch_01000083.h"
+default AMD_UCODE_PATCH_FILE="mc_patch_01000095.h"
 
 ###
 ### coreboot layout values
@@ -364,8 +365,8 @@ default MAINBOARD_POWER_ON_AFTER_POWER_FAIL="MAINBOARD_POWER_ON"
 
 ### End Options.lb
 #
-# ROMFS
+# CBFS
 #
 #
-default CONFIG_ROMFS=0
+default CONFIG_CBFS=0
 end