Move "select CACHE_AS_RAM" lines from boards into CPU socket.
[coreboot.git] / src / mainboard / amd / serengeti_cheetah_fam10 / Kconfig
index df024f5c2b0acab9a7f1e44677cd96083b38816f..a49e3c9f38beecfab611729de7d4b7ed23eecbfd 100644 (file)
-config BOARD_AMD_SERENGETI_CHEETAH_FAM10
-       bool "Serengeti Cheetah (Fam10)"
+if BOARD_AMD_SERENGETI_CHEETAH_FAM10
+
+config BOARD_SPECIFIC_OPTIONS # dummy
+       def_bool y
        select ARCH_X86
-       select CPU_AMD_FAM10
        select CPU_AMD_SOCKET_F_1207
+       select DIMM_DDR2
+       select DIMM_REGISTERED
        select NORTHBRIDGE_AMD_AMDFAM10
-       select NORTHBRIDGE_AMD_AMDFAM10_ROOT_COMPLEX
        select SOUTHBRIDGE_AMD_AMD8111
        select SOUTHBRIDGE_AMD_AMD8132
        select SUPERIO_WINBOND_W83627HF
+       select BOARD_HAS_FADT
+       select HAVE_BUS_CONFIG
+       select HAVE_OPTION_TABLE
        select HAVE_PIRQ_TABLE
        select HAVE_MP_TABLE
-       select USE_PRINTK_IN_CAR
-       select USE_DCACHE_RAM
        select HAVE_HARD_RESET
-       select IOAPIC
        select SB_HT_CHAIN_UNITID_OFFSET_ONLY
        select SERIAL_CPU_INIT
        select AMDMCT
        select HAVE_ACPI_TABLES
+       select BOARD_ROMSIZE_KB_1024
+       select RAMINIT_SYSINFO
+       select ENABLE_APIC_EXT_ID
+       select LIFT_BSP_APIC_ID
+       select TINY_BOOTBLOCK
+       select QRANK_DIMM_SUPPORT
 
 config MAINBOARD_DIR
        string
        default amd/serengeti_cheetah_fam10
-       depends on BOARD_AMD_SERENGETI_CHEETAH_FAM10
 
 config APIC_ID_OFFSET
        hex
        default 0x0
-       depends on BOARD_AMD_SERENGETI_CHEETAH_FAM10
-
-config LB_CKS_RANGE_END
-       int
-       default 122
-       depends on BOARD_AMD_SERENGETI_CHEETAH_FAM10
-
-config LB_CKS_LOC
-       int
-       default 123
-       depends on BOARD_AMD_SERENGETI_CHEETAH_FAM10
 
 config MAINBOARD_PART_NUMBER
        string
-       default "Serengeti-Cheetah-Fam10"
-       depends on BOARD_AMD_SERENGETI_CHEETAH_FAM10
-
-config HW_MEM_HOLE_SIZEK
-       hex
-       default 0x100000
-       depends on BOARD_AMD_SERENGETI_CHEETAH_FAM10
+       default "Serengeti Cheetah (Fam10)"
 
 # 6 * MAX_PHYSICAL_CPUS
 config MAX_CPUS
        int
        default 48
-       depends on BOARD_AMD_SERENGETI_CHEETAH_FAM10
 
 config MAX_PHYSICAL_CPUS
        int
        default 8
-       depends on BOARD_AMD_SERENGETI_CHEETAH_FAM10
 
-config HW_MEM_HOLE_SIZE_AUTO_INC
-       bool
-       default n
-       depends on BOARD_AMD_SERENGETI_CHEETAH_FAM10
+config MEM_TRAIN_SEQ
+       int
+       default 2
 
 config SB_HT_CHAIN_ON_BUS0
        int
        default 2
-       depends on BOARD_AMD_SERENGETI_CHEETAH_FAM10
 
 config HT_CHAIN_END_UNITID_BASE
        hex
        default 0x6
-       depends on BOARD_AMD_SERENGETI_CHEETAH_FAM10
 
 config HT_CHAIN_UNITID_BASE
        hex
        default 0xa
-       depends on BOARD_AMD_SERENGETI_CHEETAH_FAM10
-
-config USE_INIT
-       bool
-       default n
-       depends on BOARD_AMD_SERENGETI_CHEETAH_FAM10
 
 config IRQ_SLOT_COUNT
        int
        default 11
-       depends on BOARD_AMD_SERENGETI_CHEETAH_FAM10
 
 config AMD_UCODE_PATCH_FILE
        string
        default "mc_patch_01000095.h"
-       depends on BOARD_AMD_SERENGETI_CHEETAH_FAM10
 
-config LB_MEM_TOPK
+config RAMTOP
        hex
-       default 0x4000
-       depends on BOARD_AMD_SERENGETI_CHEETAH_FAM10
+       default 0x1000000
 
 config HEAP_SIZE
        hex
        default 0xc0000
-       depends on BOARD_AMD_SERENGETI_CHEETAH_FAM10
 
 config ACPI_SSDTX_NUM
        int
-       default 31
-       depends on BOARD_AMD_SERENGETI_CHEETAH_FAM10
+       default 5
 
 config MAINBOARD_PCI_SUBSYSTEM_DEVICE_ID
        hex
        default 0x2b80
-       depends on BOARD_AMD_SERENGETI_CHEETAH_FAM10
 
 config MAINBOARD_PCI_SUBSYSTEM_VENDOR_ID
        hex
        default 0x1022
-       depends on BOARD_AMD_SERENGETI_CHEETAH_FAM10
 
-config ENABLE_APIC_EXT_ID
-       bool
-       default y
-       depends on BOARD_AMD_SERENGETI_CHEETAH_FAM10
+config RAMBASE
+       hex
+       default 0x200000
+
+config ID_SECTION_OFFSET
+       hex
+       default 0x80
 
-config LIFT_BSP_APIC_ID
-       bool
-       default y
-       depends on BOARD_AMD_SERENGETI_CHEETAH_FAM10
+endif # BOARD_AMD_SERENGETI_CHEETAH_FAM10