Refactor copy_and_run so that it uses a single code base instead of

[coreboot.git] / src / mainboard / amd / serengeti_cheetah / cache_as_ram_auto.c

diff --git a/src/mainboard/amd/serengeti_cheetah/cache_as_ram_auto.c b/src/mainboard/amd/serengeti_cheetah/cache_as_ram_auto.c
index 7e60c2c7a1ad224f64d5323568fd2353a85d695b..0df32db32cebf5d33ea4f154c32c7102eec3da0d 100644 (file)
--- a/src/mainboard/amd/serengeti_cheetah/cache_as_ram_auto.c
+++ b/src/mainboard/amd/serengeti_cheetah/cache_as_ram_auto.c
@@ -24,6 +24,7 @@
 #endif
 
 #include <stdint.h>
+#include <string.h>
 #include <device/pci_def.h>
 #include <device/pci_ids.h>
 #include <arch/io.h>
@@ -63,9 +64,6 @@ static void post_code(uint8_t value) {
 
 #include "lib/delay.c"
 
-#if CONFIG_USE_INIT == 0
-       #include "lib/memcpy.c"
-#endif
 #include "northbridge/amd/amdk8/debug.c"
 #include "cpu/amd/mtrr/amd_earlymtrr.c"
 #include "superio/winbond/w83627hf/w83627hf_early_serial.c"