Add CONFIG_GENERATE_* for tables so that the user can select which tables not

[coreboot.git] / src / mainboard / amd / serengeti_cheetah / Kconfig

diff --git a/src/mainboard/amd/serengeti_cheetah/Kconfig b/src/mainboard/amd/serengeti_cheetah/Kconfig
index 5884dafbff1cf599ecee968f6ac8fd9e29df9cc0..287d3d21560aa038e8966381d5ca18907f720184 100644 (file)
--- a/src/mainboard/amd/serengeti_cheetah/Kconfig
+++ b/src/mainboard/amd/serengeti_cheetah/Kconfig
@@ -1,7 +1,3 @@
-choice
-       prompt "Mainboard model"
-       depends on VENDOR_AMD
-
 config BOARD_AMD_SERENGETI_CHEETAH
        bool "Serengeti Cheetah"
        select ARCH_X86
@@ -13,21 +9,22 @@ config BOARD_AMD_SERENGETI_CHEETAH
        select SOUTHBRIDGE_AMD_AMD8131
        select SUPERIO_WINBOND_W83627HF
        select HAVE_PIRQ_TABLE
+       select HAVE_MP_TABLE
        select USE_PRINTK_IN_CAR
-       help
-        AMD Serengeti Cheetah mainboard.
-endchoice
+       select USE_DCACHE_RAM
+       select HAVE_HARD_RESET
+       select IOAPIC
+       select MEM_TRAIN_SEQ
+       select AP_CODE_IN_CAR
+       select SB_HT_CHAIN_UNITID_OFFSET_ONLY
+       select WAIT_BEFORE_CPUS_INIT
+       select HAVE_ACPI_TABLES
 
 config MAINBOARD_DIR
        string
        default amd/serengeti_cheetah
        depends on BOARD_AMD_SERENGETI_CHEETAH
 
-config USE_DCACHE_RAM
-       int
-       default 1
-       depends on BOARD_AMD_SERENGETI_CHEETAH
-
 config DCACHE_RAM_BASE
        hex
        default 0xc8000
@@ -44,23 +41,8 @@ config DCACHE_RAM_GLOBAL_VAR_SIZE
        depends on BOARD_AMD_SERENGETI_CHEETAH
 
 config APIC_ID_OFFSET
-       int
-       default 8
-       depends on BOARD_AMD_SERENGETI_CHEETAH
-
-config HAVE_HARD_RESET
-       bool
-       default y
-       depends on BOARD_AMD_SERENGETI_CHEETAH
-
-config IOAPIC
-       bool
-       default y
-       depends on BOARD_AMD_SERENGETI_CHEETAH
-
-config SB_HT_CHAIN_ON_BUS0
-       int
-       default 2
+       hex
+       default 0x8
        depends on BOARD_AMD_SERENGETI_CHEETAH
 
 config LB_CKS_RANGE_END
@@ -78,56 +60,11 @@ config MAINBOARD_PART_NUMBER
        default "Serengeti-Cheetah"
        depends on BOARD_AMD_SERENGETI_CHEETAH
 
-config PCI_64BIT_PREF_MEM
-       int
-       default 0
-       depends on BOARD_AMD_SERENGETI_CHEETAH
-
-config USE_DCACHE_RAM
-       int
-       default 1
-       depends on BOARD_AMD_SERENGETI_CHEETAH
-
-config DCACHE_RAM_BASE
-       hex
-       default 0xc8000
-       depends on BOARD_AMD_SERENGETI_CHEETAH
-
-config DCACHE_RAM_SIZE
-       hex
-       default 0x08000
-       depends on BOARD_AMD_SERENGETI_CHEETAH
-
-config DCACHE_RAM_GLOBAL_VAR_SIZE
-       hex
-       default 0x01000
-       depends on BOARD_AMD_SERENGETI_CHEETAH
-
-config USE_FAILOVER_IMAGE
-       int
-       default 0
-       depends on BOARD_AMD_SERENGETI_CHEETAH
-
 config HW_MEM_HOLE_SIZEK
        hex
        default 0x100000
        depends on BOARD_AMD_SERENGETI_CHEETAH
 
-config MEM_TRAIN_SEQ
-       int
-       default 1
-       depends on BOARD_AMD_SERENGETI_CHEETAH
-
-config HAVE_FAILOVER_BOOT
-       int
-       default 0
-       depends on BOARD_AMD_SERENGETI_CHEETAH
-
-config USE_FAILOVER_IMAGE
-       int
-       default 0
-       depends on BOARD_AMD_SERENGETI_CHEETAH
-
 config MAX_CPUS
        int
        default 8
@@ -138,58 +75,37 @@ config MAX_PHYSICAL_CPUS
        default 4
        depends on BOARD_AMD_SERENGETI_CHEETAH
 
-config MEM_TRAIN_SEQ
-       int
-       default 1
-       depends on BOARD_AMD_SERENGETI_CHEETAH
-
-config AP_CODE_IN_CAR
-       int
-       default 1
+config HW_MEM_HOLE_SIZE_AUTO_INC
+       bool
+       default n
        depends on BOARD_AMD_SERENGETI_CHEETAH
 
-config HW_MEM_HOLE_SIZE_AUTO_INC
+config SB_HT_CHAIN_ON_BUS0
        int
-       default 0
+       default 2
        depends on BOARD_AMD_SERENGETI_CHEETAH
 
 config HT_CHAIN_END_UNITID_BASE
-       int
+       hex
        default 0x6
        depends on BOARD_AMD_SERENGETI_CHEETAH
 
-config USE_INIT
-       int
-       default 0
+config HT_CHAIN_UNITID_BASE
+       hex
+       default 0xa
        depends on BOARD_AMD_SERENGETI_CHEETAH
 
-config SERIAL_CPU_INIT
+config USE_INIT
        bool
        default n
        depends on BOARD_AMD_SERENGETI_CHEETAH
 
-config AP_CODE_IN_CAR
-       int
-       default 1
-       depends on BOARD_AMD_SERENGETI_CHEETAH
-
-config WAIT_BEFORE_CPUS_INIT
-       int
-       default 1
-       depends on BOARD_AMD_SERENGETI_CHEETAH
-
-config SB_HT_CHAIN_ON_BUS0
-       int
-       default 2
-       depends on BOARD_AMD_SERENGETI_CHEETAH
-
-config CONSOLE_VGA
+config SERIAL_CPU_INIT
        bool
-       default y
+       default n
        depends on BOARD_AMD_SERENGETI_CHEETAH
 
-config PCI_ROM_RUN
-       bool
-       default y
+config IRQ_SLOT_COUNT
+       int
+       default 11
        depends on BOARD_AMD_SERENGETI_CHEETAH
-