Clean up AMD romstage.c serial output

[coreboot.git] / src / mainboard / amd / persimmon / romstage.c

diff --git a/src/mainboard/amd/persimmon/romstage.c b/src/mainboard/amd/persimmon/romstage.c
index c1655b04ffaaeb429ac1b7e7c9883c4628f7bc5c..dfb1aca7298e72a38334b20b8f42f184c54f54b0 100644 (file)
--- a/src/mainboard/amd/persimmon/romstage.c
+++ b/src/mainboard/amd/persimmon/romstage.c
@@ -35,7 +35,7 @@
 #include "cpu/x86/lapic/boot_cpu.c"
 #include "pc80/i8254.c"
 #include "pc80/i8259.c"
-#include "SbEarly.h"
+#include "sb_cimx.h"
 #include "SBPLATFORM.h"
 
 void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx);
@@ -44,83 +44,87 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx);
 
 void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx)
 {
-  u32 val;
-  u8 reg8;
-
-  if (!cpu_init_detectedx && boot_cpu()) {
-    post_code(0x30);
-    sb_poweron_init();
-
-    post_code(0x31);
-    f81865f_enable_serial(SERIAL_DEV, CONFIG_TTYS0_BASE);
-    uart_init();
-    console_init();
-  }
-       //reg8 = pmio_read(0x24);
-  outb(0x24, 0xCD6);
-  reg8 = inb(0xCD7);
-       reg8 |= 1;
-       reg8 &= ~(1 << 1);
-       //pmio_write(0x24, reg8);
-       outb(0x24, 0xCD6);
-       outb(reg8, 0xCD7);
-
-       *(volatile u32 *)(0xFED80000+0xE00+0x40) &= ~((1 << 0) | (1 << 2)); /* 48Mhz */
-       *(volatile u32 *)(0xFED80000+0xE00+0x40) |= 1 << 1; /* 48Mhz */
-
-  /* Halt if there was a built in self test failure */
-  post_code(0x34);
-  report_bist_failure(bist);
-
-  // Load MPB
-  val = cpuid_eax(1);
-  printk(BIOS_DEBUG, "BSP Family_Model: %08x \n", val);
-  printk(BIOS_DEBUG, "cpu_init_detectedx = %08lx \n", cpu_init_detectedx);
-
-  post_code(0x35);
-  val = agesawrapper_amdinitmmio();
-
-  post_code(0x37);
-  val = agesawrapper_amdinitreset();
-  if(val) {
-    printk(BIOS_DEBUG, "agesawrapper_amdinitreset failed: %x \n", val);
-  }
-
-  post_code(0x38);
-  printk(BIOS_DEBUG, "Got past sb800_early_setup\n");
-
-  post_code(0x39);
-  val = agesawrapper_amdinitearly ();
-  if(val) {
-    printk(BIOS_DEBUG, "agesawrapper_amdinitearly failed: %x \n", val);
-  }
-  printk(BIOS_DEBUG, "Got past agesawrapper_amdinitearly\n");
-
-  post_code(0x40);
-  val = agesawrapper_amdinitpost ();
-  if(val) {
-    printk(BIOS_DEBUG, "agesawrapper_amdinitpost failed: %x \n", val);
-  }
-  printk(BIOS_DEBUG, "Got past agesawrapper_amdinitpost\n");
-
-  post_code(0x41);
-  val = agesawrapper_amdinitenv ();
-  if(val) {
-    printk(BIOS_DEBUG, "agesawrapper_amdinitenv failed: %x \n", val);
-  }
-  printk(BIOS_DEBUG, "Got past agesawrapper_amdinitenv\n");
-
-  /* Initialize i8259 pic */
-  post_code(0x41);
-  setup_i8259 ();
-
-  /* Initialize i8254 timers */
-  post_code(0x42);
-  setup_i8254 ();
-
-  post_code(0x50);
-  copy_and_run(0);
-
-  post_code(0x54);  // Should never see this post code.
+       u32 val;
+
+       /*
+        * All cores: allow caching of flash chip code and data
+        * (there are no cache-as-ram reliability concerns with family 14h)
+        */
+       __writemsr (0x20c, (0x0100000000ull - CONFIG_ROM_SIZE) | 5);
+       __writemsr (0x20d, (0x1000000000ull - CONFIG_ROM_SIZE) | 0x800);
+
+       /* All cores: set pstate 0 (1600 MHz) early to save a few ms of boot time */
+       __writemsr (0xc0010062, 0);
+
+       if (!cpu_init_detectedx && boot_cpu()) {
+               post_code(0x30);
+               sb_Poweron_Init();
+
+               post_code(0x31);
+               f81865f_enable_serial(SERIAL_DEV, CONFIG_TTYS0_BASE);
+               console_init();
+       }
+
+       /* Halt if there was a built in self test failure */
+       post_code(0x34);
+       report_bist_failure(bist);
+
+       /* Load MPB */
+       val = cpuid_eax(1);
+       printk(BIOS_DEBUG, "BSP Family_Model: %08x \n", val);
+       printk(BIOS_DEBUG, "cpu_init_detectedx = %08lx \n", cpu_init_detectedx);
+
+       post_code(0x35);
+       printk(BIOS_DEBUG, "agesawrapper_amdinitmmio ");
+       val = agesawrapper_amdinitmmio();
+       if (val)
+               printk(BIOS_DEBUG, "error level: %x \n", val);
+       else
+               printk(BIOS_DEBUG, "passed.\n");
+
+       post_code(0x37);
+       printk(BIOS_DEBUG, "agesawrapper_amdinitreset ");
+       val = agesawrapper_amdinitreset();
+       if (val)
+               printk(BIOS_DEBUG, "error level: %x \n", val);
+       else
+               printk(BIOS_DEBUG, "passed.\n");
+
+       post_code(0x39);
+       printk(BIOS_DEBUG, "agesawrapper_amdinitearly ");
+       val = agesawrapper_amdinitearly ();
+       if (val)
+               printk(BIOS_DEBUG, "error level: %x \n", val);
+       else
+               printk(BIOS_DEBUG, "passed.\n");
+
+       post_code(0x40);
+       printk(BIOS_DEBUG, "agesawrapper_amdinitpost ");
+       val = agesawrapper_amdinitpost ();
+       if (val)
+               printk(BIOS_DEBUG, "error level: %x \n", val);
+       else
+               printk(BIOS_DEBUG, "passed.\n");
+
+       post_code(0x41);
+       printk(BIOS_DEBUG, "agesawrapper_amdinitenv ");
+       val = agesawrapper_amdinitenv ();
+       if (val)
+               printk(BIOS_DEBUG, "error level: %x \n", val);
+       else
+               printk(BIOS_DEBUG, "passed.\n");
+
+       /* Initialize i8259 pic */
+       post_code(0x41);
+       setup_i8259 ();
+
+       /* Initialize i8254 timers */
+       post_code(0x42);
+       setup_i8254 ();
+
+       post_code(0x50);
+       copy_and_run(0);
+       printk(BIOS_ERR, "Error: copy_and_run() returned!\n");
+
+       post_code(0x54);        /* Should never see this post code. */
 }
-