AMD Geode cpus: apply un-written naming rules

[coreboot.git] / src / mainboard / amd / norwich / Kconfig

diff --git a/src/mainboard/amd/norwich/Kconfig b/src/mainboard/amd/norwich/Kconfig
index 9d7874af2f512916babcbfa8d2fa6879941f683f..dec8e01d34767e3203ceab0b9ef893c5b81341be 100644 (file)
--- a/src/mainboard/amd/norwich/Kconfig
+++ b/src/mainboard/amd/norwich/Kconfig
@@ -1,47 +1,27 @@
-config BOARD_AMD_NORWICH
-       bool "Norwich"
+if BOARD_AMD_NORWICH
+
+config BOARD_SPECIFIC_OPTIONS # dummy
+       def_bool y
        select ARCH_X86
-       select CPU_AMD_LX
+       select CPU_AMD_GEODE_LX
        select NORTHBRIDGE_AMD_LX
        select SOUTHBRIDGE_AMD_CS5536
        select HAVE_PIRQ_TABLE
        select PIRQ_ROUTE
        select UDELAY_TSC
-       select TSC_X86RDTSC_CALIBRATE_WITH_TIMER2
-       select USE_DCACHE_RAM
-       select USE_PRINTK_IN_CAR
+       select BOARD_ROMSIZE_KB_256
+       select POWER_BUTTON_FORCE_ENABLE
 
 config MAINBOARD_DIR
        string
        default amd/norwich
-       depends on BOARD_AMD_NORWICH
 
 config MAINBOARD_PART_NUMBER
        string
-       default "NORWICH"
-       depends on BOARD_AMD_NORWICH
-
-config HAVE_OPTION_TABLE
-       bool
-       default n
-       depends on BOARD_AMD_NORWICH
+       default "Norwich"
 
 config IRQ_SLOT_COUNT
        int
        default 6
-       depends on BOARD_AMD_NORWICH
-
-config DCACHE_RAM_BASE
-       hex
-       default 0xc8000
-       depends on BOARD_AMD_NORWICH
-
-config DCACHE_RAM_SIZE
-       hex
-       default 0x8000
-       depends on BOARD_AMD_NORWICH
 
-config RAMBASE
-       hex
-       default 0x4000
-       depends on BOARD_AMD_NORWICH
+endif # BOARD_AMD_NORWICH