Move "select CACHE_AS_RAM" lines from boards into CPU socket.

[coreboot.git] / src / mainboard / amd / mahogany_fam10 / mainboard.c

diff --git a/src/mainboard/amd/mahogany_fam10/mainboard.c b/src/mainboard/amd/mahogany_fam10/mainboard.c
index 73ff5198eeb598795613a6a6619ff714aacffa79..7ed615dd5b6c3faeaa2fbbf1ee1d2b57f1549bb9 100644 (file)
--- a/src/mainboard/amd/mahogany_fam10/mainboard.c
+++ b/src/mainboard/amd/mahogany_fam10/mainboard.c
@@ -21,20 +21,20 @@
 #include <device/device.h>
 #include <device/pci.h>
 #include <arch/io.h>
-#include <boot/coreboot_tables.h>
+#include <boot/tables.h>
 #include <cpu/x86/msr.h>
 #include <cpu/amd/mtrr.h>
 #include <device/pci_def.h>
-#include <../southbridge/amd/sb700/sb700.h>
+#include <southbridge/amd/sb700/sb700.h>
 #include "chip.h"
 
 #define SMBUS_IO_BASE 0x6000
 
-extern void lb_add_memory_range(struct lb_memory *mem, uint32_t type,
-                               uint64_t start, uint64_t size);
-
 uint64_t uma_memory_base, uma_memory_size;
 
+void set_pcie_dereset(void);
+void set_pcie_reset(void);
+u8 is_dev3_present(void);
 /*
  * Mahogany uses GPIO 6 as PCIe slot reset, GPIO4 as GFX slot reset. We need to
  * pull it up before training the slot.
@@ -65,12 +65,13 @@ void set_pcie_reset()
        pci_write_config16(sm_dev, 0xA8, word);
 }
 
+#if 0       /* not tested yet. */
 /********************************************************
-* mahogany uses SB700 GPIO8 to detect IDE_DMA66.
-* IDE_DMA66 is routed to GPIO 8. So we read Gpio 8 to
+* mahogany uses SB700 GPIO9 to detect IDE_DMA66.
+* IDE_DMA66 is routed to GPIO 9. So we read Gpio 9 to
 * get the cable type, 40 pin or 80 pin?
 ********************************************************/
-static void get_ide_dma66()
+static void get_ide_dma66(void)
 {
        u8 byte;
        /*u32 sm_dev, ide_dev; */
@@ -79,28 +80,31 @@ static void get_ide_dma66()
        sm_dev = dev_find_slot(0, PCI_DEVFN(0x14, 0));
 
        byte = pci_read_config8(sm_dev, 0xA9);
-       byte |= (1 << 4);       /* Set Gpio8 as input */
+       byte |= (1 << 5);       /* Set Gpio9 as input */
        pci_write_config8(sm_dev, 0xA9, byte);
 
        ide_dev = dev_find_slot(0, PCI_DEVFN(0x14, 1));
        byte = pci_read_config8(ide_dev, 0x56);
        byte &= ~(7 << 0);
-       if ((1 << 4) & pci_read_config8(sm_dev, 0xAA))
+       if ((1 << 5) & pci_read_config8(sm_dev, 0xAA))
                byte |= 2 << 0; /* mode 2 */
        else
                byte |= 5 << 0; /* mode 5 */
        pci_write_config8(ide_dev, 0x56, byte);
 }
+#endif /* get_ide_dma66() */
+
+u8 is_dev3_present(void)
+{
+       return 0;
+}
 
 /*************************************************
 * enable the dedicated function in mahogany board.
 * This function called early than rs780_enable.
 *************************************************/
-void mahogany_enable(device_t dev)
+static void mahogany_enable(device_t dev)
 {
-       struct mainboard_config *mainboard =
-           (struct mainboard_config *)dev->chip_info;
-
        printk(BIOS_INFO, "Mainboard MAHOGANY Enable. dev=0x%p\n", dev);
 
 #if (CONFIG_GFXUMA == 1)
@@ -153,11 +157,12 @@ int add_mainboard_resources(struct lb_memory *mem)
         * in some circumstances we want the memory mentioned as reserved.
         */
 #if (CONFIG_GFXUMA == 1)
-       printk(BIOS_INFO, "uma_memory_start=0x%x, uma_memory_size=0x%x \n",
-       uma_memory_base, uma_memory_size);
-       lb_add_memory_range(mem, LB_MEM_RESERVED,
-               uma_memory_base, uma_memory_size);
+       printk(BIOS_INFO, "uma_memory_start=0x%llx, uma_memory_size=0x%llx \n",
+                   uma_memory_base, uma_memory_size);
+       lb_add_memory_range(mem, LB_MEM_RESERVED, uma_memory_base,
+                           uma_memory_size);
 #endif
+       return 0;
 }
 
 struct chip_operations mainboard_ops = {