* Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
*/
-
#include <console/console.h>
#include <arch/smp/mpspec.h>
#include <device/pci.h>
#include <arch/io.h>
#include <string.h>
#include <stdint.h>
-
#include <cpu/amd/amdk8_sysconf.h>
-extern u8 bus_isa;
extern u8 bus_rs690[8];
extern u8 bus_sb600[2];
-extern unsigned long apicid_sb600;
+extern u32 apicid_sb600;
-extern unsigned long bus_type[256];
-extern unsigned long sbdn_rs690;
-extern unsigned long sbdn_sb600;
+extern u32 sbdn_rs690;
+extern u32 sbdn_sb600;
-extern void get_bus_conf(void);
-
-void *smp_write_config_table(void *v)
+static void *smp_write_config_table(void *v)
{
- static const char sig[4] = "PCMP";
- static const char oem[8] = "ATI ";
- static const char productid[12] = "DBM690T ";
struct mp_config_table *mc;
- int i, j;
+ int bus_isa;
mc = (void *)(((char *)v) + SMP_FLOATING_TABLE_LEN);
- memset(mc, 0, sizeof(*mc));
-
- memcpy(mc->mpc_signature, sig, sizeof(sig));
- mc->mpc_length = sizeof(*mc); /* initially just the header */
- mc->mpc_spec = 0x04;
- mc->mpc_checksum = 0; /* not yet computed */
- memcpy(mc->mpc_oem, oem, sizeof(oem));
- memcpy(mc->mpc_productid, productid, sizeof(productid));
- mc->mpc_oemptr = 0;
- mc->mpc_oemsize = 0;
- mc->mpc_entry_count = 0; /* No entries yet... */
- mc->mpc_lapic = LAPIC_ADDR;
- mc->mpe_length = 0;
- mc->mpe_checksum = 0;
- mc->reserved = 0;
+
+ mptable_init(mc, LAPIC_ADDR);
smp_write_processors(mc);
get_bus_conf();
- /* Bus: Bus ID Type */
- /* define bus and isa numbers */
- for (j = 0; j < bus_isa; j++) {
- smp_write_bus(mc, j, (char *)"PCI ");
- }
- smp_write_bus(mc, bus_isa, (char *)"ISA ");
+ mptable_write_buses(mc, NULL, &bus_isa);
/* I/O APICs: APIC ID Version State Address */
{
/* dword |= 1<<22; PIC and APIC co exists */
pci_write_config32(dev, 0xac, dword);
- /*
+ /*
* 00:12.0: PROG SATA : INT F
* 00:13.0: INTA USB_0
* 00:13.1: INTB USB_1
}
/* I/O Ints: Type Polarity Trigger Bus ID IRQ APIC ID PIN# */
- smp_write_intsrc(mc, mp_ExtINT,
- MP_IRQ_TRIGGER_EDGE | MP_IRQ_POLARITY_HIGH, bus_isa,
- 0x0, apicid_sb600, 0x0);
- smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_EDGE | MP_IRQ_POLARITY_HIGH,
- bus_isa, 0x1, apicid_sb600, 0x1);
- smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_EDGE | MP_IRQ_POLARITY_HIGH,
- bus_isa, 0x0, apicid_sb600, 0x2);
- smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_EDGE | MP_IRQ_POLARITY_HIGH,
- bus_isa, 0x3, apicid_sb600, 0x3);
- smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_EDGE | MP_IRQ_POLARITY_HIGH,
- bus_isa, 0x4, apicid_sb600, 0x4);
- smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_EDGE | MP_IRQ_POLARITY_HIGH,
- bus_isa, 0x6, apicid_sb600, 0x6);
- smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_EDGE | MP_IRQ_POLARITY_HIGH,
- bus_isa, 0x7, apicid_sb600, 0x7);
- smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_EDGE | MP_IRQ_POLARITY_HIGH,
- bus_isa, 0xc, apicid_sb600, 0xc);
- smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_EDGE | MP_IRQ_POLARITY_HIGH,
- bus_isa, 0xd, apicid_sb600, 0xd);
- smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_EDGE | MP_IRQ_POLARITY_HIGH,
- bus_isa, 0xe, apicid_sb600, 0xe);
+#define IO_LOCAL_INT(type, intr, apicid, pin) \
+ smp_write_lintsrc(mc, (type), MP_IRQ_TRIGGER_EDGE | MP_IRQ_POLARITY_HIGH, bus_isa, (intr), (apicid), (pin));
+
+ mptable_add_isa_interrupts(mc, bus_isa, apicid_sb600, 0);
+
+ /* PCI interrupts are level triggered, and are
+ * associated with a specific bus/device/function tuple.
+ */
+#if CONFIG_GENERATE_ACPI_TABLES == 0
+#define PCI_INT(bus, dev, fn, pin) \
+ smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, (bus), (((dev)<<2)|(fn)), apicid_sb600, (pin))
+#else
+#define PCI_INT(bus, dev, fn, pin)
+#endif
/* usb */
- smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL | MP_IRQ_POLARITY_LOW,
- 0, 19 << 2 | 0, apicid_sb600, 0x10);
- smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL | MP_IRQ_POLARITY_LOW,
- 0, 19 << 2 | 1, apicid_sb600, 0x11);
- smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL | MP_IRQ_POLARITY_LOW,
- 0, 19 << 2 | 2, apicid_sb600, 0x12);
- smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL | MP_IRQ_POLARITY_LOW,
- 0, 19 << 2 | 3, apicid_sb600, 0x13);
+ PCI_INT(0x0, 0x13, 0x0, 0x10);
+ PCI_INT(0x0, 0x13, 0x1, 0x11);
+ PCI_INT(0x0, 0x13, 0x2, 0x12);
+ PCI_INT(0x0, 0x13, 0x3, 0x13);
/* sata */
- smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL | MP_IRQ_POLARITY_LOW,
- 0, 18 << 2 | 0, apicid_sb600, 22);
+ PCI_INT(0x0, 0x12, 0x0, 0x16);
/* HD Audio: b0:d20:f1:reg63 should be 0. */
- smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL | MP_IRQ_POLARITY_LOW,
- 0, 20 << 2 | 0, apicid_sb600, 16);
+ PCI_INT(0x0, 0x14, 0x0, 0x10);
/* on board NIC & Slot PCIE. */
- i = 2;
- smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL | MP_IRQ_POLARITY_LOW,
- bus_rs690[1], 0x5 << 2 | 0, apicid_sb600, 18);
- smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL | MP_IRQ_POLARITY_LOW,
- bus_rs690[1], 0x5 << 2 | 1, apicid_sb600, 19);
- smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL | MP_IRQ_POLARITY_LOW,
- bus_rs690[2], 0x0 << 2 | 0, apicid_sb600, 18);
- smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL | MP_IRQ_POLARITY_LOW,
- bus_rs690[3], 0x0 << 2 | 0, apicid_sb600, 19);
- smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL | MP_IRQ_POLARITY_LOW,
- bus_rs690[4], 0x0 << 2 | 0, apicid_sb600, 16);
- smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL | MP_IRQ_POLARITY_LOW,
- bus_rs690[5], 0x0 << 2 | 0, apicid_sb600, 17);
- smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL | MP_IRQ_POLARITY_LOW,
- bus_rs690[6], 0x0 << 2 | 0, apicid_sb600, 18);
- smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL | MP_IRQ_POLARITY_LOW,
- bus_rs690[7], 0x0 << 2 | 0, apicid_sb600, 19);
+ PCI_INT(bus_rs690[1], 0x5, 0x0, 0x12);
+ PCI_INT(bus_rs690[1], 0x5, 0x1, 0x13);
+ PCI_INT(bus_rs690[2], 0x0, 0x0, 0x12);
+ PCI_INT(bus_rs690[3], 0x0, 0x0, 0x13);
+ PCI_INT(bus_rs690[4], 0x0, 0x0, 0x10);
+ PCI_INT(bus_rs690[5], 0x0, 0x0, 0x11);
+ PCI_INT(bus_rs690[6], 0x0, 0x0, 0x12);
+ PCI_INT(bus_rs690[7], 0x0, 0x0, 0x13);
/* PCI slots */
- i += 6;
- j = 5;
/* PCI_SLOT 0. */
- smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL | MP_IRQ_POLARITY_LOW,
- bus_sb600[1], 5 << 2 | 0, apicid_sb600, 20);
- smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL | MP_IRQ_POLARITY_LOW,
- bus_sb600[1], 5 << 2 | 1, apicid_sb600, 21);
- smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL | MP_IRQ_POLARITY_LOW,
- bus_sb600[1], 5 << 2 | 2, apicid_sb600, 22);
- smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL | MP_IRQ_POLARITY_LOW,
- bus_sb600[1], 5 << 2 | 3, apicid_sb600, 23);
+ PCI_INT(bus_sb600[1], 0x5, 0x0, 0x14);
+ PCI_INT(bus_sb600[1], 0x5, 0x1, 0x15);
+ PCI_INT(bus_sb600[1], 0x5, 0x2, 0x16);
+ PCI_INT(bus_sb600[1], 0x5, 0x3, 0x17);
/* PCI_SLOT 1. */
- smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL | MP_IRQ_POLARITY_LOW,
- bus_sb600[1], 6 << 2 | 0, apicid_sb600, 21);
- smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL | MP_IRQ_POLARITY_LOW,
- bus_sb600[1], 6 << 2 | 1, apicid_sb600, 22);
- smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL | MP_IRQ_POLARITY_LOW,
- bus_sb600[1], 6 << 2 | 2, apicid_sb600, 23);
- smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL | MP_IRQ_POLARITY_LOW,
- bus_sb600[1], 6 << 2 | 3, apicid_sb600, 20);
+ PCI_INT(bus_sb600[1], 0x6, 0x0, 0x15);
+ PCI_INT(bus_sb600[1], 0x6, 0x1, 0x16);
+ PCI_INT(bus_sb600[1], 0x6, 0x2, 0x17);
+ PCI_INT(bus_sb600[1], 0x6, 0x3, 0x14);
/* PCI_SLOT 2. */
- smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL | MP_IRQ_POLARITY_LOW,
- bus_sb600[1], 7 << 2 | 0, apicid_sb600, 22);
- smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL | MP_IRQ_POLARITY_LOW,
- bus_sb600[1], 7 << 2 | 1, apicid_sb600, 23);
- smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL | MP_IRQ_POLARITY_LOW,
- bus_sb600[1], 7 << 2 | 2, apicid_sb600, 20);
- smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL | MP_IRQ_POLARITY_LOW,
- bus_sb600[1], 7 << 2 | 3, apicid_sb600, 21);
+ PCI_INT(bus_sb600[1], 0x7, 0x0, 0x16);
+ PCI_INT(bus_sb600[1], 0x7, 0x1, 0x17);
+ PCI_INT(bus_sb600[1], 0x7, 0x2, 0x14);
+ PCI_INT(bus_sb600[1], 0x7, 0x3, 0x15);
/*Local Ints: Type Polarity Trigger Bus ID IRQ APIC ID PIN# */
- smp_write_intsrc(mc, mp_ExtINT,
- MP_IRQ_TRIGGER_EDGE | MP_IRQ_POLARITY_HIGH, bus_isa,
- 0x0, MP_APIC_ALL, 0x0);
- smp_write_intsrc(mc, mp_NMI, MP_IRQ_TRIGGER_EDGE | MP_IRQ_POLARITY_HIGH,
- bus_isa, 0x0, MP_APIC_ALL, 0x1);
+ IO_LOCAL_INT(mp_ExtINT, 0x0, MP_APIC_ALL, 0x0);
+ IO_LOCAL_INT(mp_NMI, 0x0, MP_APIC_ALL, 0x1);
/* There is no extension information... */
/* Compute the checksums */
mc->mpe_checksum =
smp_compute_checksum(smp_next_mpc_entry(mc), mc->mpe_length);
mc->mpc_checksum = smp_compute_checksum(mc, mc->mpc_length);
- printk_debug("Wrote the mp table end at: %p - %p\n",
+ printk(BIOS_DEBUG, "Wrote the mp table end at: %p - %p\n",
mc, smp_next_mpe_entry(mc));
return smp_next_mpe_entry(mc);
}
projects / coreboot.git / blobdiff