refactor vesa mode setting code and bootsplash code

[coreboot.git] / src / lib / uart8250.c

diff --git a/src/lib/uart8250.c b/src/lib/uart8250.c
index fbdf4ac8436d2ddfacac0f701127345efde9ac28..b2246713cac087d03d4f010121219ace09eff13b 100644 (file)
--- a/src/lib/uart8250.c
+++ b/src/lib/uart8250.c
@@ -21,11 +21,12 @@
 #include <arch/io.h>
 #include <uart8250.h>
 #include <pc80/mc146818rtc.h>
+#include <trace.h>
+
 #if CONFIG_USE_OPTION_TABLE
 #include "option_table.h"
 #endif
 
-
 /* Should support 8250, 16450, 16550, 16550A type UARTs */
 
 static inline int uart8250_can_tx_byte(unsigned base_port)
@@ -49,7 +50,10 @@ void uart8250_tx_byte(unsigned base_port, unsigned char data)
 {
        uart8250_wait_to_tx_byte(base_port);
        outb(data, base_port + UART_TBR);
-       /* Make certain the data clears the fifos */
+}
+
+void uart8250_tx_flush(unsigned base_port)
+{
        uart8250_wait_until_sent(base_port);
 }
 
@@ -67,6 +71,7 @@ unsigned char uart8250_rx_byte(unsigned base_port)
 
 void uart8250_init(unsigned base_port, unsigned divisor)
 {
+       DISABLE_TRACE;
        /* Disable interrupts */
        outb(0x0, base_port + UART_IER);
        /* Enable FIFOs */
@@ -84,37 +89,32 @@ void uart8250_init(unsigned base_port, unsigned divisor)
 
        /* Set to 3 for 8N1 */
        outb(CONFIG_TTYS0_LCS, base_port + UART_LCR);
+       ENABLE_TRACE;
 }
 
-#ifndef __ROMCC__
-/* Initialize a generic uart */
-void init_uart8250(unsigned base_port, struct uart8250 *uart)
-{
-       int divisor = uart->baud ? (115200/uart->baud) : 1;
-
-       if (base_port == CONFIG_TTYS0_BASE) {
-               /* Don't reinitialize the console serial port,
-                * This is espeically nasty in SMP.
-                * NOTE: The first invocation thus always needs to be 
-                */
-               return;
-       }
-       uart8250_init(base_port, divisor);
-}
-#endif
-
 void uart_init(void)
 {
-#if CONFIG_USE_OPTION_TABLE
-        static const unsigned char divisor[] = { 1, 2, 3, 6, 12, 24, 48, 96 };
-        unsigned ttys0_div, ttys0_index;
-        ttys0_index = read_option(CMOS_VSTART_baud_rate, CMOS_VLEN_baud_rate, 0);
-        ttys0_index &= 7;
-        ttys0_div = divisor[ttys0_index];
-
-       uart8250_init(CONFIG_TTYS0_BASE, ttys0_div);
+       /* TODO the divisor calculation is hard coded to standard UARTs. Some
+        * UARTs won't work with these values. This should be a property of the
+        * UART used, worst case a Kconfig variable. For now live with hard
+        * codes as the only devices that might be different are the iWave
+        * iRainbowG6 and the OXPCIe952 card (and the latter is memory mapped)
+        */
+       unsigned int div = (115200 / CONFIG_TTYS0_BAUD);
+
+#if !defined(__SMM__) && CONFIG_USE_OPTION_TABLE
+       static const unsigned char divisor[8] = { 1, 2, 3, 6, 12, 24, 48, 96 };
+       unsigned b_index = 0;
+#if defined(__PRE_RAM__)
+       b_index = read_option(baud_rate, 0);
+       b_index &= 7;
+       div = divisor[b_index];
 #else
-       uart8250_init(CONFIG_TTYS0_BASE, CONFIG_TTYS0_DIV);
+       if (get_option(&b_index, "baud_rate") == 0) {
+               div = divisor[b_index];
+       }
+#endif
 #endif
-}
 
+       uart8250_init(CONFIG_TTYS0_BASE, div);
+}