drop half an uart8250 implementation from smiutil and use the common code

[coreboot.git] / src / lib / uart8250.c

diff --git a/src/lib/uart8250.c b/src/lib/uart8250.c
index e3a1255dc6f6f2277db4f76fc119e9db87280369..8149b03aa6fc31251670130e84fc194b85b6a508 100644 (file)
--- a/src/lib/uart8250.c
+++ b/src/lib/uart8250.c
@@ -1,28 +1,36 @@
-/* Should support 8250, 16450, 16550, 16550A type uarts */
+/*
+ * This file is part of the coreboot project.
+ *
+ * Copyright (C) 2003 Eric Biederman
+ * Copyright (C) 2006-2010 coresystems GmbH
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; version 2 of the License.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
+ */
+
 #include <arch/io.h>
 #include <uart8250.h>
+#include <pc80/mc146818rtc.h>
+#if CONFIG_USE_OPTION_TABLE
+#include "option_table.h"
+#endif
+
+
+/* Should support 8250, 16450, 16550, 16550A type UARTs */
 
-/* Data */
-#define UART_RBR 0x00
-#define UART_TBR 0x00
-
-/* Control */
-#define UART_IER 0x01
-#define UART_IIR 0x02
-#define UART_FCR 0x02
-#define UART_LCR 0x03
-#define UART_MCR 0x04
-#define UART_DLL 0x00
-#define UART_DLM 0x01
-
-/* Status */
-#define UART_LSR 0x05
-#define UART_MSR 0x06
-#define UART_SCR 0x07
-
-static int uart8250_can_tx_byte(unsigned base_port)
+static inline int uart8250_can_tx_byte(unsigned base_port)
 {
-       return inb(base_port + UART_LSR) & 0x20;
+       return inb(base_port + UART_LSR) & UART_MSR_DSR;
 }
 
 static inline void uart8250_wait_to_tx_byte(unsigned base_port)
@@ -33,7 +41,7 @@ static inline void uart8250_wait_to_tx_byte(unsigned base_port)
 
 static inline void uart8250_wait_until_sent(unsigned base_port)
 {
-       while(!(inb(base_port + UART_LSR) & 0x40)) 
+       while(!(inb(base_port + UART_LSR) & UART_LSR_TEMT))
                ;
 }
 
@@ -47,7 +55,7 @@ void uart8250_tx_byte(unsigned base_port, unsigned char data)
 
 int uart8250_can_rx_byte(unsigned base_port)
 {
-       return inb(base_port + UART_LSR) & 0x01;
+       return inb(base_port + UART_LSR) & UART_LSR_DR;
 }
 
 unsigned char uart8250_rx_byte(unsigned base_port)
@@ -57,32 +65,57 @@ unsigned char uart8250_rx_byte(unsigned base_port)
        return inb(base_port + UART_RBR);
 }
 
-void uart8250_init(unsigned base_port, unsigned divisor, unsigned lcs)
+void uart8250_init(unsigned base_port, unsigned divisor)
 {
-       lcs &= 0x7f;
-       /* disable interrupts */
+       /* Disable interrupts */
        outb(0x0, base_port + UART_IER);
-       /* enable fifo's */
-       outb(0x01, base_port + UART_FCR);
-       /* Set Baud Rate Divisor to 12 ==> 115200 Baud */
-       outb(0x80 | lcs, base_port + UART_LCR);
+       /* Enable FIFOs */
+       outb(UART_FCR_FIFO_EN, base_port + UART_FCR);
+
+       /* assert DTR and RTS so the other end is happy */
+       outb(UART_MCR_DTR | UART_MCR_RTS, base_port + UART_MCR);
+
+       /* DLAB on */
+       outb(UART_LCR_DLAB | CONFIG_TTYS0_LCS, base_port + UART_LCR);
+
+       /* Set Baud Rate Divisor. 12 ==> 115200 Baud */
        outb(divisor & 0xFF,   base_port + UART_DLL);
        outb((divisor >> 8) & 0xFF,    base_port + UART_DLM);
-       outb(lcs, base_port + UART_LCR);
+
+       /* Set to 3 for 8N1 */
+       outb(CONFIG_TTYS0_LCS, base_port + UART_LCR);
 }
 
+#ifndef __ROMCC__
 /* Initialize a generic uart */
 void init_uart8250(unsigned base_port, struct uart8250 *uart)
 {
-       int divisor;
-       int lcs;
-       divisor = 115200/(uart->baud ? uart->baud: 1);
-       lcs = 3;
-       if (base_port == TTYS0_BASE) {
+       int divisor = uart->baud ? (115200/uart->baud) : 1;
+
+       if (base_port == CONFIG_TTYS0_BASE) {
                /* Don't reinitialize the console serial port,
                 * This is espeically nasty in SMP.
+                * NOTE: The first invocation thus always needs to be 
                 */
                return;
        }
-       uart8250_init(base_port, divisor, lcs);
+       uart8250_init(base_port, divisor);
+}
+#endif
+
+#if defined(__PRE_RAM__) || defined(__SMM__)
+void uart_init(void)
+{
+#if CONFIG_USE_OPTION_TABLE && !defined(__SMM__)
+        static const unsigned char divisor[] = { 1, 2, 3, 6, 12, 24, 48, 96 };
+        unsigned ttys0_div, ttys0_index;
+        ttys0_index = read_option(CMOS_VSTART_baud_rate, CMOS_VLEN_baud_rate, 0);
+        ttys0_index &= 7;
+        ttys0_div = divisor[ttys0_index];
+
+       uart8250_init(CONFIG_TTYS0_BASE, ttys0_div);
+#else
+       uart8250_init(CONFIG_TTYS0_BASE, CONFIG_TTYS0_DIV);
+#endif
 }
+#endif