#define PORT_DMA2_MODE_REG 0x00d6
#define PORT_DMA2_MASTER_CLEAR 0x00da
#define PORT_MATH_CLEAR 0x00f0
+#define PORT_ATA2_CMD_BASE 0x0170
+#define PORT_ATA1_CMD_BASE 0x01f0
#define PORT_LPT2 0x0278
#define PORT_SERIAL4 0x02e8
#define PORT_SERIAL2 0x02f8
+#define PORT_ATA2_CTRL_BASE 0x0374
#define PORT_LPT1 0x0378
#define PORT_SERIAL3 0x03e8
+#define PORT_ATA1_CTRL_BASE 0x03f4
+#define PORT_FD_BASE 0x03f0
#define PORT_FD_DOR 0x03f2
#define PORT_FD_STATUS 0x03f4
#define PORT_FD_DATA 0x03f5
#define PORT_FD_DIR 0x03f7
#define PORT_SERIAL1 0x03f8
#define PORT_PCI_CMD 0x0cf8
+#define PORT_PCI_REBOOT 0x0cf9
#define PORT_PCI_DATA 0x0cfc
#define PORT_BIOS_DEBUG 0x0402
#define PORT_QEMU_CFG_CTL 0x0510
}
static inline void insb(u16 port, u8 *data, u32 count) {
- asm volatile("rep insb (%%dx), %%es:(%%di)"
+ asm volatile("rep insb (%%dx), %%es:(%%edi)"
: "+c"(count), "+D"(data) : "d"(port) : "memory");
}
static inline void insw(u16 port, u16 *data, u32 count) {
- asm volatile("rep insw (%%dx), %%es:(%%di)"
+ asm volatile("rep insw (%%dx), %%es:(%%edi)"
: "+c"(count), "+D"(data) : "d"(port) : "memory");
}
static inline void insl(u16 port, u32 *data, u32 count) {
- asm volatile("rep insl (%%dx), %%es:(%%di)"
+ asm volatile("rep insl (%%dx), %%es:(%%edi)"
: "+c"(count), "+D"(data) : "d"(port) : "memory");
}
// XXX - outs not limited to es segment
static inline void outsb(u16 port, u8 *data, u32 count) {
- asm volatile("rep outsb %%es:(%%si), (%%dx)"
+ asm volatile("rep outsb %%es:(%%esi), (%%dx)"
: "+c"(count), "+S"(data) : "d"(port) : "memory");
}
static inline void outsw(u16 port, u16 *data, u32 count) {
- asm volatile("rep outsw %%es:(%%si), (%%dx)"
+ asm volatile("rep outsw %%es:(%%esi), (%%dx)"
: "+c"(count), "+S"(data) : "d"(port) : "memory");
}
static inline void outsl(u16 port, u32 *data, u32 count) {
- asm volatile("rep outsl %%es:(%%si), (%%dx)"
+ asm volatile("rep outsl %%es:(%%esi), (%%dx)"
: "+c"(count), "+S"(data) : "d"(port) : "memory");
}