MTRR: get physical address size from CPUID

[coreboot.git] / src / include / cpu / x86 / mtrr.h

diff --git a/src/include/cpu/x86/mtrr.h b/src/include/cpu/x86/mtrr.h
index 51c0b511c7670005a567b7c4465a2cb1bd0d83e0..62cb8b7a3f2dfa387dc607ba3874f5266807363d 100644 (file)
--- a/src/include/cpu/x86/mtrr.h
+++ b/src/include/cpu/x86/mtrr.h
@@ -1,7 +1,6 @@
 #ifndef CPU_X86_MTRR_H
 #define CPU_X86_MTRR_H
 
-
 /*  These are the region types  */
 #define MTRR_TYPE_UNCACHEABLE 0
 #define MTRR_TYPE_WRCOMB     1
@@ -15,9 +14,14 @@
 #define MTRRcap_MSR     0x0fe
 #define MTRRdefType_MSR 0x2ff
 
+#define MTRRdefTypeEn          (1 << 11)
+#define MTRRdefTypeFixEn       (1 << 10)
+
 #define MTRRphysBase_MSR(reg) (0x200 + 2 * (reg))
 #define MTRRphysMask_MSR(reg) (0x200 + 2 * (reg) + 1)
 
+#define MTRRphysMaskValid      (1 << 11)
+
 #define NUM_FIXED_RANGES 88
 #define MTRRfix64K_00000_MSR 0x250
 #define MTRRfix16K_80000_MSR 0x258
@@ -31,15 +35,26 @@
 #define MTRRfix4K_F0000_MSR 0x26e
 #define MTRRfix4K_F8000_MSR 0x26f
 
-
-#if !defined(__ROMCC__) && !defined (ASSEMBLY)
-
-
-void x86_setup_var_mtrrs(unsigned address_bits);
-void x86_setup_mtrrs(unsigned address_bits);
+#if !defined (__ASSEMBLER__) && !defined(__PRE_RAM__)
+#include <device/device.h>
+void enable_fixed_mtrr(void);
+void x86_setup_var_mtrrs(unsigned int address_bits, unsigned int above4gb);
+void x86_setup_mtrrs(void);
 int x86_mtrr_check(void);
+void set_var_mtrr_resource(void *gp, struct device *dev, struct resource *res);
+void x86_setup_fixed_mtrrs(void);
+#endif
+
+#if !defined(CONFIG_RAMTOP)
+# error "CONFIG_RAMTOP not defined"
+#endif
 
-#endif /* __ROMCC__ */
+#if ((CONFIG_XIP_ROM_SIZE & (CONFIG_XIP_ROM_SIZE -1)) != 0)
+# error "CONFIG_XIP_ROM_SIZE is not a power of 2"
+#endif
 
+#if (CONFIG_RAMTOP & (CONFIG_RAMTOP - 1)) != 0
+# error "CONFIG_RAMTOP must be a power of 2"
+#endif
 
 #endif /* CPU_X86_MTRR_H */