* is expected to be information that cannot be discovered by
* other means, such as quering the hardware directly.
*
- * All of the information should be Position Independent Data.
+ * All of the information should be Position Independent Data.
* That is it should be safe to relocated any of the information
* without it's meaning/correctnes changing. For table that
* can reasonably be used on multiple architectures the data
* table entries and be backwards compatible, but it is not required.
*/
-/* Since coreboot is usually compiled 32bit, gcc will align 64bit
- * types to 32bit boundaries. If the coreboot table is dumped on a
- * 64bit system, a uint64_t would be aligned to 64bit boundaries,
+/* Since coreboot is usually compiled 32bit, gcc will align 64bit
+ * types to 32bit boundaries. If the coreboot table is dumped on a
+ * 64bit system, a uint64_t would be aligned to 64bit boundaries,
* breaking the table format.
*
* lb_uint64 will keep 64bit coreboot table values aligned to 32bit
* See also: util/lbtdump/lbtdump.c
*/
-/* AMD rs690 chip, declare global variables. */
-#if (CONFIG_GFXUMA == 1)
- unsigned long uma_memory_start, uma_memory_size;
-#endif
-
-
struct lb_uint64 {
uint32_t lo;
uint32_t hi;
static inline uint64_t unpack_lb64(struct lb_uint64 value)
{
- uint64_t result;
- result = value.hi;
- result = (result << 32) + value.lo;
- return result;
+ uint64_t result;
+ result = value.hi;
+ result = (result << 32) + value.lo;
+ return result;
}
static inline struct lb_uint64 pack_lb64(uint64_t value)
{
- struct lb_uint64 result;
- result.lo = (value >> 0) & 0xffffffff;
- result.hi = (value >> 32) & 0xffffffff;
- return result;
+ struct lb_uint64 result;
+ result.lo = (value >> 0) & 0xffffffff;
+ result.hi = (value >> 32) & 0xffffffff;
+ return result;
}
-
-
struct lb_header
{
uint8_t signature[4]; /* LBIO */
struct lb_uint64 start;
struct lb_uint64 size;
uint32_t type;
-#define LB_MEM_RAM 1 /* Memory anyone can use */
-#define LB_MEM_RESERVED 2 /* Don't use this memory region */
-#define LB_MEM_TABLE 16 /* Ram configuration tables are kept in */
+#define LB_MEM_RAM 1 /* Memory anyone can use */
+#define LB_MEM_RESERVED 2 /* Don't use this memory region */
+#define LB_MEM_ACPI 3 /* ACPI Tables */
+#define LB_MEM_NVS 4 /* ACPI NVS Memory */
+#define LB_MEM_UNUSABLE 5 /* Unusable address space */
+#define LB_MEM_VENDOR_RSVD 6 /* Vendor Reserved */
+#define LB_MEM_TABLE 16 /* Ram configuration tables are kept in */
};
struct lb_memory {
#define LB_TAG_CONSOLE_SROM 4
#define LB_TAG_CONSOLE_EHCI 5
+#define LB_TAG_FORWARD 0x0011
+struct lb_forward {
+ uint32_t tag;
+ uint32_t size;
+ uint64_t forward;
+};
+
+#define LB_TAG_FRAMEBUFFER 0x0012
+struct lb_framebuffer {
+ uint32_t tag;
+ uint32_t size;
+
+ uint64_t physical_address;
+ uint32_t x_resolution;
+ uint32_t y_resolution;
+ uint32_t bytes_per_line;
+ uint8_t bits_per_pixel;
+ uint8_t red_mask_pos;
+ uint8_t red_mask_size;
+ uint8_t green_mask_pos;
+ uint8_t green_mask_size;
+ uint8_t blue_mask_pos;
+ uint8_t blue_mask_size;
+ uint8_t reserved_mask_pos;
+ uint8_t reserved_mask_size;
+};
+
/* The following structures are for the cmos definitions table */
#define LB_TAG_CMOS_OPTION_TABLE 200
/* cmos header record */
uint32_t config; /* e=enumeration, h=hex, r=reserved */
uint32_t config_id; /* a number linking to an enumeration record */
#define CMOS_MAX_NAME_LENGTH 32
- uint8_t name[CMOS_MAX_NAME_LENGTH]; /* name of entry in ascii,
+ uint8_t name[CMOS_MAX_NAME_LENGTH]; /* name of entry in ascii,
variable length int aligned */
};
uint32_t config_id; /* a number identifying the config id */
uint32_t value; /* the value associated with the text */
#define CMOS_MAX_TEXT_LENGTH 32
- uint8_t text[CMOS_MAX_TEXT_LENGTH]; /* enum description in ascii,
+ uint8_t text[CMOS_MAX_TEXT_LENGTH]; /* enum description in ascii,
variable length int aligned */
};
uint32_t size; /* length of this record */
uint32_t name_length; /* length of the following name field */
uint8_t name[CMOS_MAX_NAME_LENGTH]; /* name identifying the default */
-#define CMOS_IMAGE_BUFFER_SIZE 128
+#define CMOS_IMAGE_BUFFER_SIZE 256
uint8_t default_set[CMOS_IMAGE_BUFFER_SIZE]; /* default settings */
};
#define CHECKSUM_PCBIOS 1
};
-
-
#endif /* COREBOOT_TABLES_H */