Various cosmetic and coding style fixes in src/devices.

[coreboot.git] / src / devices / pcix_device.c

diff --git a/src/devices/pcix_device.c b/src/devices/pcix_device.c
index 270d255b1eca09982d7c11ced96b614b8cfd9f4c..6bfd35dc6017571a9f69eae2793a6502df4deec5 100644 (file)
--- a/src/devices/pcix_device.c
+++ b/src/devices/pcix_device.c
@@ -24,23 +24,23 @@
 #include <device/pci_ids.h>
 #include <device/pcix.h>
 
-
 static void pcix_tune_dev(device_t dev)
 {
-       unsigned cap;
-       unsigned status, orig_cmd, cmd;
-       unsigned max_read, max_tran;
+       u32 status;
+       u16 orig_cmd, cmd;
+       unsigned int cap, max_read, max_tran;
 
-       if (dev->hdr_type != PCI_HEADER_TYPE_NORMAL) {
+       if (dev->hdr_type != PCI_HEADER_TYPE_NORMAL)
                return;
-       }
+
        cap = pci_find_capability(dev, PCI_CAP_ID_PCIX);
-       if (!cap) {
+       if (!cap)
                return;
-       }
-       printk_debug("%s PCI-X tuning\n", dev_path(dev));
+
+       printk(BIOS_DEBUG, "%s PCI-X tuning\n", dev_path(dev));
+
        status = pci_read_config32(dev, cap + PCI_X_STATUS);
-       orig_cmd = cmd = pci_read_config16(dev,cap + PCI_X_CMD);
+       orig_cmd = cmd = pci_read_config16(dev, cap + PCI_X_CMD);
 
        max_read = (status & PCI_X_STATUS_MAX_READ) >> 21;
        max_tran = (status & PCI_X_STATUS_MAX_SPLIT) >> 23;
@@ -52,32 +52,26 @@ static void pcix_tune_dev(device_t dev)
                cmd &= ~PCI_X_CMD_MAX_SPLIT;
                cmd |= max_tran << 4;
        }
-       /* Don't attempt to handle PCI-X errors */
+
+       /* Don't attempt to handle PCI-X errors. */
        cmd &= ~PCI_X_CMD_DPERR_E;
-       /* Enable Relaxed Ordering */
+
+       /* Enable relaxed ordering. */
        cmd |= PCI_X_CMD_ERO;
-       if (orig_cmd != cmd) {
+
+       if (orig_cmd != cmd)
                pci_write_config16(dev, cap + PCI_X_CMD, cmd);
-       }
 }
 
-unsigned int pcix_scan_bus(struct bus *bus,
-       unsigned min_devfn, unsigned max_devfn, unsigned int max)
+static void pcix_tune_bus(struct bus *bus)
 {
        device_t child;
-       max = pci_scan_bus(bus, min_devfn, max_devfn, max);
-       for(child = bus->children; child; child = child->sibling) {
-               if (    (child->path.u.pci.devfn < min_devfn) ||
-                       (child->path.u.pci.devfn > max_devfn))
-               {
-                       continue;
-               }
+
+       for (child = bus->children; child; child = child->sibling)
                pcix_tune_dev(child);
-       }
-       return max;
 }
 
-const char *pcix_speed(unsigned sstatus)
+const char *pcix_speed(u16 sstatus)
 {
        static const char conventional[] = "Conventional PCI";
        static const char pcix_66mhz[] = "66MHz PCI-X";
@@ -86,12 +80,13 @@ const char *pcix_speed(unsigned sstatus)
        static const char pcix_266mhz[] = "266MHz PCI-X";
        static const char pcix_533mhz[] = "533MHZ PCI-X";
        static const char unknown[] = "Unknown";
-               
        const char *result;
+
        result = unknown;
-       switch(PCI_X_SSTATUS_MFREQ(sstatus)) {
-       case PCI_X_SSTATUS_CONVENTIONAL_PCI:    
-               result = conventional; 
+
+       switch (PCI_X_SSTATUS_MFREQ(sstatus)) {
+       case PCI_X_SSTATUS_CONVENTIONAL_PCI:
+               result = conventional;
                break;
        case PCI_X_SSTATUS_MODE1_66MHZ:
                result = pcix_66mhz;
@@ -99,48 +94,45 @@ const char *pcix_speed(unsigned sstatus)
        case PCI_X_SSTATUS_MODE1_100MHZ:
                result = pcix_100mhz;
                break;
-               
        case PCI_X_SSTATUS_MODE1_133MHZ:
                result = pcix_133mhz;
                break;
-               
        case PCI_X_SSTATUS_MODE2_266MHZ_REF_66MHZ:
        case PCI_X_SSTATUS_MODE2_266MHZ_REF_100MHZ:
        case PCI_X_SSTATUS_MODE2_266MHZ_REF_133MHZ:
                result = pcix_266mhz;
                break;
-               
        case PCI_X_SSTATUS_MODE2_533MHZ_REF_66MHZ:
        case PCI_X_SSTATUS_MODE2_533MHZ_REF_100MHZ:
        case PCI_X_SSTATUS_MODE2_533MHZ_REF_133MHZ:
                result = pcix_533mhz;
                break;
        }
+
        return result;
 }
 
 unsigned int pcix_scan_bridge(device_t dev, unsigned int max)
 {
-       unsigned pos;
-       unsigned sstatus;
+       unsigned int pos;
+       u16 sstatus;
+
+       max = do_pci_scan_bridge(dev, max, pci_scan_bus);
 
-       /* Find the PCI-X capability */
+       /* Find the PCI-X capability. */
        pos = pci_find_capability(dev, PCI_CAP_ID_PCIX);
        sstatus = pci_read_config16(dev, pos + PCI_X_SEC_STATUS);
 
-       if (PCI_X_SSTATUS_MFREQ(sstatus) == PCI_X_SSTATUS_CONVENTIONAL_PCI) {
-               max = do_pci_scan_bridge(dev, max, pci_scan_bus);
-       } else {
-               max = do_pci_scan_bridge(dev, max, pcix_scan_bus);
-       }
+       if (PCI_X_SSTATUS_MFREQ(sstatus) != PCI_X_SSTATUS_CONVENTIONAL_PCI)
+               pcix_tune_bus(dev->link_list);
 
-       /* Print the PCI-X bus speed */
-       printk_debug("PCI: %02x: %s\n", dev->link[0].secondary, pcix_speed(sstatus));
+       /* Print the PCI-X bus speed. */
+       printk(BIOS_DEBUG, "PCI: %02x: %s\n", dev->link_list->secondary,
+              pcix_speed(sstatus));
 
        return max;
 }
 
-
 /** Default device operations for PCI-X bridges */
 static struct pci_operations pcix_bus_ops_pci = {
        .set_subsystem = 0,
@@ -150,8 +142,8 @@ struct device_operations default_pcix_ops_bus = {
        .read_resources   = pci_bus_read_resources,
        .set_resources    = pci_dev_set_resources,
        .enable_resources = pci_bus_enable_resources,
-       .init             = 0,
-       .scan_bus         = pcix_scan_bridge,
+       .init             = 0,
+       .scan_bus         = pcix_scan_bridge,
        .enable           = 0,
        .reset_bus        = pci_bus_reset,
        .ops_pci          = &pcix_bus_ops_pci,