* matching capability. Always start at the head of the list.
*
* @param dev Pointer to the device structure.
- * @param cap_type PCI_CAP_LIST_ID of the PCI capability we're looking for.
+ * @param cap PCI_CAP_LIST_ID of the PCI capability we're looking for.
* @param last Location of the PCI capability register to start from.
+ * @return The next matching capability.
*/
unsigned pci_find_next_capability(struct device *dev, unsigned cap,
unsigned last)
int this_cap;
pos &= ~3;
this_cap = pci_read_config8(dev, pos + PCI_CAP_LIST_ID);
- printk_spew("Capability: type 0x%02x @ 0x%02x\n", this_cap,
+ printk(BIOS_SPEW, "Capability: type 0x%02x @ 0x%02x\n", this_cap,
pos);
if (this_cap == 0xff) {
break;
* capability. Always start at the head of the list.
*
* @param dev Pointer to the device structure.
- * @param cap_type PCI_CAP_LIST_ID of the PCI capability we're looking for.
+ * @param cap PCI_CAP_LIST_ID of the PCI capability we're looking for.
+ * @return The next matching capability.
*/
unsigned pci_find_capability(device_t dev, unsigned cap)
{
*
* @param dev Pointer to the device structure.
* @param index Address of the PCI configuration register.
+ * @return TODO
*/
struct resource *pci_get_resource(struct device *dev, unsigned long index)
{
*/
if (moving == 0) {
if (value != 0) {
- printk_debug
- ("%s register %02lx(%08lx), read-only ignoring it\n",
+ printk(BIOS_DEBUG, "%s register %02lx(%08lx), read-only ignoring it\n",
dev_path(dev), index, value);
}
resource->flags = 0;
resource->flags |= IORESOURCE_PCI64;
} else {
/* Invalid value. */
- printk_err("Broken BAR with value %lx\n", attr);
- printk_err(" on dev %s at index %02lx\n",
+ printk(BIOS_ERR, "Broken BAR with value %lx\n", attr);
+ printk(BIOS_ERR, " on dev %s at index %02lx\n",
dev_path(dev), index);
resource->flags = 0;
}
resource->flags |= IORESOURCE_MEM | IORESOURCE_READONLY;
} else {
if (value != 0) {
- printk_debug
- ("%s register %02lx(%08lx), read-only ignoring it\n",
+ printk(BIOS_DEBUG, "%s register %02lx(%08lx), read-only ignoring it\n",
dev_path(dev), index, value);
}
resource->flags = 0;
/* See if the bridge I/O resources are implemented. */
moving_base = ((u32) pci_moving_config8(dev, PCI_IO_BASE)) << 8;
moving_base |=
- ((u32) pci_moving_config16(dev, PCI_IO_BASE_UPPER16)) << 16;
+ ((u32) pci_moving_config16(dev, PCI_IO_BASE_UPPER16)) << 16;
moving_limit = ((u32) pci_moving_config8(dev, PCI_IO_LIMIT)) << 8;
moving_limit |=
- ((u32) pci_moving_config16(dev, PCI_IO_LIMIT_UPPER16)) << 16;
+ ((u32) pci_moving_config16(dev, PCI_IO_LIMIT_UPPER16)) << 16;
moving = moving_base & moving_limit;
/* See if the bridge prefmem resources are implemented. */
moving_base =
- ((resource_t) pci_moving_config16(dev, PCI_PREF_MEMORY_BASE)) << 16;
+ ((resource_t) pci_moving_config16(dev, PCI_PREF_MEMORY_BASE)) << 16;
moving_base |=
- ((resource_t) pci_moving_config32(dev, PCI_PREF_BASE_UPPER32)) <<
- 32;
+ ((resource_t) pci_moving_config32(dev, PCI_PREF_BASE_UPPER32)) << 32;
moving_limit =
- ((resource_t) pci_moving_config16(dev, PCI_PREF_MEMORY_LIMIT)) <<
- 16;
+ ((resource_t) pci_moving_config16(dev, PCI_PREF_MEMORY_LIMIT)) << 16;
moving_limit |=
- ((resource_t) pci_moving_config32(dev, PCI_PREF_LIMIT_UPPER32)) <<
- 32;
+ ((resource_t) pci_moving_config32(dev, PCI_PREF_LIMIT_UPPER32)) << 32;
moving = moving_base & moving_limit;
/* Initialize the prefetchable memory constraints on the current bus. */
/* Make certain the resource has actually been assigned a value. */
if (!(resource->flags & IORESOURCE_ASSIGNED)) {
- printk_err("ERROR: %s %02lx %s size: 0x%010llx not assigned\n",
+ printk(BIOS_ERR, "ERROR: %s %02lx %s size: 0x%010llx not assigned\n",
dev_path(dev), resource->index,
resource_type(resource), resource->size);
return;
} else {
/* Don't let me think I stored the resource. */
resource->flags &= ~IORESOURCE_STORED;
- printk_err("ERROR: invalid resource->index %lx\n",
+ printk(BIOS_ERR, "ERROR: invalid resource->index %lx\n",
resource->index);
}
report_resource_stored(dev, resource, "");
void pci_dev_set_resources(struct device *dev)
{
- struct resource *resource, *last;
- unsigned link;
+ struct resource *res;
+ struct bus *bus;
u8 line;
- last = &dev->resource[dev->resources];
-
- for (resource = &dev->resource[0]; resource < last; resource++) {
- pci_set_resource(dev, resource);
+ for (res = dev->resource_list; res; res = res->next) {
+ pci_set_resource(dev, res);
}
- for (link = 0; link < dev->links; link++) {
- struct bus *bus;
- bus = &dev->link[link];
+ for (bus = dev->link_list; bus; bus = bus->next) {
if (bus->children) {
assign_resources(bus);
}
/* Set the subsystem vendor and device id for mainboard devices. */
ops = ops_pci(dev);
if (dev->on_mainboard && ops && ops->set_subsystem) {
- printk_debug("%s subsystem <- %02x/%02x\n",
+ printk(BIOS_DEBUG, "%s subsystem <- %02x/%02x\n",
dev_path(dev),
CONFIG_MAINBOARD_PCI_SUBSYSTEM_VENDOR_ID,
CONFIG_MAINBOARD_PCI_SUBSYSTEM_DEVICE_ID);
/* v3 has
* command |= (PCI_COMMAND_PARITY + PCI_COMMAND_SERR); // Error check.
*/
- printk_debug("%s cmd <- %02x\n", dev_path(dev), command);
+ printk(BIOS_DEBUG, "%s cmd <- %02x\n", dev_path(dev), command);
pci_write_config16(dev, PCI_COMMAND, command);
}
/* Enable I/O in command register if there is VGA card
* connected with (even it does not claim I/O resource).
*/
- if (dev->link[0].bridge_ctrl & PCI_BRIDGE_CTL_VGA)
+ if (dev->link_list->bridge_ctrl & PCI_BRIDGE_CTL_VGA)
dev->command |= PCI_COMMAND_IO;
ctrl = pci_read_config16(dev, PCI_BRIDGE_CONTROL);
- ctrl |= dev->link[0].bridge_ctrl;
+ ctrl |= dev->link_list->bridge_ctrl;
ctrl |= (PCI_BRIDGE_CTL_PARITY + PCI_BRIDGE_CTL_SERR); /* Error check. */
- printk_debug("%s bridge ctrl <- %04x\n", dev_path(dev), ctrl);
+ printk(BIOS_DEBUG, "%s bridge ctrl <- %04x\n", dev_path(dev), ctrl);
pci_write_config16(dev, PCI_BRIDGE_CONTROL, ctrl);
pci_dev_enable_resources(dev);
- enable_childrens_resources(dev);
}
void pci_bus_reset(struct bus *bus)
};
/**
- * @brief Detect the type of downstream bridge
+ * Detect the type of downstream bridge.
*
* This function is a heuristic to detect which type of bus is downstream
* of a PCI-to-PCI bridge. This functions by looking for various capability
#if CONFIG_PCIX_PLUGIN_SUPPORT == 1
pos = pci_find_capability(dev, PCI_CAP_ID_PCIX);
if (pos) {
- printk_debug("%s subordinate bus PCI-X\n", dev_path(dev));
+ printk(BIOS_DEBUG, "%s subordinate bus PCI-X\n", dev_path(dev));
return &default_pcix_ops_bus;
}
#endif
flags = pci_read_config16(dev, pos + PCI_CAP_FLAGS);
if ((flags >> 13) == 1) {
/* Host or Secondary Interface */
- printk_debug("%s subordinate bus Hypertransport\n",
+ printk(BIOS_DEBUG, "%s subordinate bus Hypertransport\n",
dev_path(dev));
return &default_ht_ops_bus;
}
case PCI_EXP_TYPE_ROOT_PORT:
case PCI_EXP_TYPE_UPSTREAM:
case PCI_EXP_TYPE_DOWNSTREAM:
- printk_debug("%s subordinate bus PCI Express\n",
+ printk(BIOS_DEBUG, "%s subordinate bus PCI Express\n",
dev_path(dev));
return &default_pciexp_ops_bus;
case PCI_EXP_TYPE_PCI_BRIDGE:
- printk_debug("%s subordinate PCI\n", dev_path(dev));
+ printk(BIOS_DEBUG, "%s subordinate PCI\n", dev_path(dev));
return &default_pci_ops_bus;
default:
break;
}
/**
- * Set up PCI device operation. Check if it already has a driver. If not, use
- * find_device_operations, or set to a default based on type.
+ * Set up PCI device operation.
+ *
+ * Check if it already has a driver. If not, use find_device_operations(),
+ * or set to a default based on type.
*
* @param dev Pointer to the device whose pci_ops you want to set.
* @see pci_drivers
if ((driver->vendor == dev->vendor) &&
(driver->device == dev->device)) {
dev->ops = (struct device_operations *)driver->ops;
- printk_spew("%s [%04x/%04x] %sops\n",
+ printk(BIOS_SPEW, "%s [%04x/%04x] %sops\n",
dev_path(dev),
driver->vendor, driver->device,
(driver->ops->scan_bus ? "bus " : ""));
default:
bad:
if (dev->enabled) {
- printk_err("%s [%04x/%04x/%06x] has unknown header "
+ printk(BIOS_ERR, "%s [%04x/%04x/%06x] has unknown header "
"type %02x, ignoring.\n",
dev_path(dev),
dev->vendor, dev->device,
}
/**
- * @brief See if we have already allocated a device structure for a given devfn.
+ * See if we have already allocated a device structure for a given devfn.
*
* Given a linked list of PCI device structures and a devfn number, find the
* device structure correspond to the devfn, if present. This function also
*
* @param list The device structure list.
* @param devfn A device/function number.
- *
* @return Pointer to the device structure found or NULL if we have not
* allocated a device for this devfn yet.
*/
dev = 0;
for (; *list; list = &(*list)->sibling) {
if ((*list)->path.type != DEVICE_PATH_PCI) {
- printk_err("child %s not a pci device\n",
+ printk(BIOS_ERR, "child %s not a pci device\n",
dev_path(*list));
continue;
}
}
/**
- * @brief Scan a PCI bus.
+ * Scan a PCI bus.
*
* Determine the existence of a given PCI device. Allocate a new struct device
* if dev==NULL was passed in and the device exists in hardware.
*
- * @param bus pointer to the bus structure
- * @param devfn to look at
- *
- * @return The device structure for hte device (if found)
- * or the NULL if no device is found.
+ * @param dev Pointer to the dev structure.
+ * @param bus Pointer to the bus structure.
+ * @param devfn A device/function number to look at.
+ * @return The device structure for the device (if found), NULL otherwise.
*/
-device_t pci_probe_dev(device_t dev, struct bus * bus, unsigned devfn)
+device_t pci_probe_dev(device_t dev, struct bus *bus, unsigned devfn)
{
u32 id, class;
u8 hdr_type;
dummy.path.pci.devfn = devfn;
id = pci_read_config32(&dummy, PCI_VENDOR_ID);
/* Have we found something?
- * Some broken boards return 0 if a slot is empty.
+ * Some broken boards return 0 if a slot is empty, but
+ * the expected answer is 0xffffffff
*/
- if ((id == 0xffffffff) || (id == 0x00000000) ||
- (id == 0x0000ffff) || (id == 0xffff0000)) {
- printk_spew("%s, bad id 0x%x\n", dev_path(&dummy), id);
+ if (id == 0xffffffff) {
+ return NULL;
+ }
+ if ((id == 0x00000000) || (id == 0x0000ffff) ||
+ (id == 0xffff0000)) {
+ printk(BIOS_SPEW, "%s, bad id 0x%x\n", dev_path(&dummy), id);
return NULL;
}
dev = alloc_dev(bus, &dummy.path);
if ((id == 0xffffffff) || (id == 0x00000000) ||
(id == 0x0000ffff) || (id == 0xffff0000)) {
if (dev->enabled) {
- printk_info("PCI: Static device %s not found, disabling it.\n",
+ printk(BIOS_INFO, "PCI: Static device %s not found, disabling it.\n",
dev_path(dev));
dev->enabled = 0;
}
}
/* Display the device. */
- printk_debug("%s [%04x/%04x] %s%s\n",
+ printk(BIOS_DEBUG, "%s [%04x/%04x] %s%s\n",
dev_path(dev),
dev->vendor, dev->device,
dev->enabled ? "enabled" : "disabled",
}
/**
- * @brief Scan a PCI bus.
+ * Scan a PCI bus.
*
* Determine the existence of devices and bridges on a PCI bus. If there are
* bridges on the bus, recursively scan the buses behind the bridges.
* This function is the default scan_bus() method for the root device
* 'dev_root'.
*
- * @param bus pointer to the bus structure
- * @param min_devfn minimum devfn to look at in the scan usually 0x00
- * @param max_devfn maximum devfn to look at in the scan usually 0xff
- * @param max current bus number
- *
- * @return The maximum bus number found, after scanning all subordinate busses
+ * @param bus Pointer to the bus structure.
+ * @param min_devfn Minimum devfn to look at in the scan, usually 0x00.
+ * @param max_devfn Maximum devfn to look at in the scan, usually 0xff.
+ * @param max Current bus number.
+ * @return The maximum bus number found, after scanning all subordinate busses.
*/
unsigned int pci_scan_bus(struct bus *bus,
unsigned min_devfn, unsigned max_devfn,
struct device *child;
#if CONFIG_PCI_BUS_SEGN_BITS
- printk_debug("PCI: pci_scan_bus for bus %04x:%02x\n",
+ printk(BIOS_DEBUG, "PCI: pci_scan_bus for bus %04x:%02x\n",
bus->secondary >> 8, bus->secondary & 0xff);
#else
- printk_debug("PCI: pci_scan_bus for bus %02x\n", bus->secondary);
+ printk(BIOS_DEBUG, "PCI: pci_scan_bus for bus %02x\n", bus->secondary);
#endif
+ // Maximum sane devfn is 0xFF
+ if (max_devfn > 0xff) {
+ printk(BIOS_ERR, "PCI: pci_scan_bus limits devfn %x - devfn %x\n",
+ min_devfn, max_devfn );
+ printk(BIOS_ERR, "PCI: pci_scan_bus upper limit too big. Using 0xff.\n");
+ max_devfn=0xff;
+ }
+
old_devices = bus->children;
bus->children = NULL;
*/
if (old_devices) {
device_t left;
- printk_warning("PCI: Left over static devices:\n");
+ printk(BIOS_WARNING, "PCI: Left over static devices:\n");
for (left = old_devices; left; left = left->sibling) {
- printk_warning("%s\n", dev_path(left));
+ printk(BIOS_WARNING, "%s\n", dev_path(left));
}
- printk_warning("PCI: Check your mainboard Config.lb.\n");
+ printk(BIOS_WARNING, "PCI: Check your mainboard Config.lb.\n");
}
/* For all children that implement scan_bus() (i.e. bridges)
* side of any bridges that may be on this bus plus any devices.
* Return how far we've got finding sub-buses.
*/
- printk_debug("PCI: pci_scan_bus returning with max=%03x\n", max);
+ printk(BIOS_DEBUG, "PCI: pci_scan_bus returning with max=%03x\n", max);
post_code(0x55);
return max;
}
/**
- * @brief Scan a PCI bridge and the buses behind the bridge.
+ * Scan a PCI bridge and the buses behind the bridge.
*
* Determine the existence of buses behind the bridge. Set up the bridge
* according to the result of the scan.
*
* @param dev Pointer to the bridge device.
* @param max The highest bus number assigned up to now.
+ * @param do_scan_bus TODO
* @return The maximum bus number found, after scanning all subordinate buses.
*/
unsigned int do_pci_scan_bridge(struct device *dev, unsigned int max,
u32 buses;
u16 cr;
- printk_spew("%s for %s\n", __func__, dev_path(dev));
+ printk(BIOS_SPEW, "%s for %s\n", __func__, dev_path(dev));
- bus = &dev->link[0];
- bus->dev = dev;
- dev->links = 1;
+ if (dev->link_list == NULL) {
+ struct bus *link;
+ link = malloc(sizeof(*link));
+ if (link == NULL)
+ die("Couldn't allocate a link!\n");
+ memset(link, 0, sizeof(*link));
+ link->dev = dev;
+ dev->link_list = link;
+ }
+
+ bus = dev->link_list;
/* Set up the primary, secondary and subordinate bus numbers. We have
* no idea how many buses are behind this bridge yet, so we set the
pci_write_config32(dev, PCI_PRIMARY_BUS, buses);
pci_write_config16(dev, PCI_COMMAND, cr);
- printk_spew("%s returns max %d\n", __func__, max);
+ printk(BIOS_SPEW, "%s returns max %d\n", __func__, max);
return max;
}
/**
- * @brief Scan a PCI bridge and the buses behind the bridge.
+ * Scan a PCI bridge and the buses behind the bridge.
*
* Determine the existence of buses behind the bridge. Set up the bridge
* according to the result of the scan.
}
/**
- * @brief Scan a PCI domain.
+ * Scan a PCI domain.
*
* This function is the default scan_bus() method for PCI domains.
*
- * @param dev pointer to the domain
- * @param max the highest bus number assgined up to now
- *
- * @return The maximum bus number found, after scanning all subordinate busses
+ * @param dev Pointer to the domain.
+ * @param max The highest bus number assigned up to now.
+ * @return The maximum bus number found, after scanning all subordinate busses.
*/
unsigned int pci_domain_scan_bus(device_t dev, unsigned int max)
{
- max = pci_scan_bus(&dev->link[0], PCI_DEVFN(0, 0), 0xff, max);
+ max = pci_scan_bus(dev->link_list, PCI_DEVFN(0, 0), 0xff, max);
return max;
}
#if CONFIG_PC80_SYSTEM == 1
/**
- *
- * @brief Assign IRQ numbers
+ * Assign IRQ numbers.
*
* This function assigns IRQs for all functions contained within the indicated
* device address. If the device does not exist or does not require interrupts
*
* This function should be called for each PCI slot in your system.
*
- * @param bus
- * @param slot
- * @param pIntAtoD is an array of IRQ #s that are assigned to PINTA through
- * PINTD of this slot. The particular irq #s that are passed in
- * depend on the routing inside your southbridge and on your
- * motherboard.
+ * @param bus Pointer to the bus structure.
+ * @param slot TODO
+ * @param pIntAtoD An array of IRQ #s that are assigned to PINTA through PINTD
+ * of this slot. The particular IRQ #s that are passed in depend on the
+ * routing inside your southbridge and on your board.
*/
void pci_assign_irqs(unsigned bus, unsigned slot,
const unsigned char pIntAtoD[4])
irq = pIntAtoD[line - 1];
- printk_debug("Assigning IRQ %d to %d:%x.%d\n",
+ printk(BIOS_DEBUG, "Assigning IRQ %d to %d:%x.%d\n",
irq, bus, slot, funct);
- pci_write_config8(pdev, PCI_INTERRUPT_LINE,
+ pci_write_config8(pdev, PCI_INTERRUPT_LINE,
pIntAtoD[line - 1]);
#ifdef PARANOID_IRQ_ASSIGNMENTS
irq = pci_read_config8(pdev, PCI_INTERRUPT_LINE);
- printk_debug(" Readback = %d\n", irq);
+ printk(BIOS_DEBUG, " Readback = %d\n", irq);
#endif
// Change to level triggered
projects / coreboot.git / blobdiff