(trivial) add filo call back for those few mainboards that still (need to)

[coreboot.git] / src / devices / device.c

diff --git a/src/devices/device.c b/src/devices/device.c
index e6fc99463da3d6245587c822e0cc616ef2f609e5..06d32ea1f8bb61260a99f95613d816352a4d9898 100644 (file)
--- a/src/devices/device.c
+++ b/src/devices/device.c
@@ -357,8 +357,7 @@ void compute_allocate_resource(
                        resource->flags &= ~IORESOURCE_STORED;
                        base += size;
                        
-                       printk_spew(
-                               "%s %02x *  [0x%08Lx - 0x%08Lx] %s\n",
+                       printk_spew("%s %02lx *  [0x%08Lx - 0x%08Lx] %s\n",
                                dev_path(dev),
                                resource->index, 
                                resource->base, 
@@ -366,6 +365,12 @@ void compute_allocate_resource(
                                (resource->flags & IORESOURCE_IO)? "io":
                                (resource->flags & IORESOURCE_PREFETCH)? "prefmem": "mem");
                }
+#if CONFIG_PCIE_CONFIGSPACE_HOLE
+#warning Handle PCIe hole differently...
+               if (base >= 0xf0000000 && base < 0xf4000000) {
+                       base = 0xf4000000;
+               }
+#endif
        }
        /* A pci bridge resource does not need to be a power
         * of two size, but it does have a minimum granularity.