sizeram removal/conversion.

[coreboot.git] / src / cpu / x86 / tsc / Config.lb

diff --git a/src/cpu/x86/tsc/Config.lb b/src/cpu/x86/tsc/Config.lb
index 07272ad9d7cd4a27a13db945f82724688ccf1f58..72905eb5bb5bdc8ff60c83d7e1c14291a36d6e39 100644 (file)
--- a/src/cpu/x86/tsc/Config.lb
+++ b/src/cpu/x86/tsc/Config.lb
@@ -1,5 +1,9 @@
 uses CONFIG_UDELAY_TSC
 uses CONFIG_TSC_X86RDTSC_CALIBRATE_WITH_TIMER2
+uses HAVE_INIT_TIMER
 
 default CONFIG_TSC_X86RDTSC_CALIBRATE_WITH_TIMER2=0
-if CONFIG_UDELAY_TSC object delay_tsc.o  end
+if CONFIG_UDELAY_TSC 
+       default HAVE_INIT_TIMER=1
+       object delay_tsc.o  
+end