typedef enum { SMI_LOCKED, SMI_UNLOCKED } smi_semaphore;
/* SMI multiprocessing semaphore */
-static volatile smi_semaphore smi_handler_status = SMI_UNLOCKED;
+static volatile smi_semaphore smi_handler_status __attribute__ ((aligned (4))) = SMI_UNLOCKED;
static int smi_obtain_lock(void)
{
return (ret == SMI_UNLOCKED);
}
-static void smi_release_lock(void)
+void smi_release_lock(void)
{
asm volatile (
"movb %1, %%al\n"
southbridge_smi_set_eos();
}
+static u32 pci_orig;
+
+/**
+ * @brief Backup PCI address to make sure we do not mess up the OS
+ */
+static void smi_backup_pci_address(void)
+{
+ pci_orig = inl(0xcf8);
+}
+
+/**
+ * @brief Restore PCI address previously backed up
+ */
+static void smi_restore_pci_address(void)
+{
+ outl(pci_orig, 0xcf8);
+}
+
/**
* @brief Interrupt handler for SMI#
*
/* For security reasons we don't release the other CPUs
* until the CPU with the lock is actually done
*/
- while (smi_handler_status == SMI_LOCKED) /* wait */ ;
+ while (smi_handler_status == SMI_LOCKED) {
+ asm volatile (
+ ".byte 0xf3, 0x90\n" /* hint a CPU we are in spinlock (PAUSE instruction, REP NOP) */
+ );
+ }
return;
}
+ smi_backup_pci_address();
+
node=nodeid();
console_init();
if (southbridge_smi_handler)
southbridge_smi_handler(node, &state_save);
+ smi_restore_pci_address();
+
smi_release_lock();
/* De-assert SMI# signal to allow another SMI */