makes the smi handler a little bit less verbose
[coreboot.git] / src / cpu / x86 / smm / smihandler.c
index 0dc8926653df18ddce8ae85d2411629d8e97739c..858cf59bdf6c3490cd85e7e64efefc05ce1b139d 100644 (file)
@@ -129,7 +129,18 @@ void console_tx_byte(unsigned char byte)
 
 void io_trap_handler(int smif)
 {
-       southbridge_io_trap_handler(smif);
+       /* If a handler function handled a given IO trap, it
+        * shall return a non-zero value
+        */
+        printk_debug("SMI function trap 0x%x: ", smif);
+
+       if (southbridge_io_trap_handler(smif))
+               return;
+
+       if (mainboard_io_trap_handler(smif))
+               return;
+
+       printk_debug("Unknown function\n");
 }
 
 /**
@@ -148,10 +159,6 @@ static void smi_set_eos(void)
 
 void smi_handler(u32 smm_revision)
 {
-       u8 reg8;
-       u16 pmctrl;
-       u16 pm1_sts;
-       u32 smi_sts, gpe0_sts, tco_sts;
        unsigned int node;
        smm_state_save_area_t state_save;
 
@@ -167,7 +174,7 @@ void smi_handler(u32 smm_revision)
        console_loglevel = 1;
 #endif
 
-       printk_debug("\nSMI# #%d\n", node);
+       printk_spew("\nSMI# #%d\n", node);
 
        switch (smm_revision) {
        case 0x00030007:
@@ -194,6 +201,10 @@ void smi_handler(u32 smm_revision)
                return;
        }
 
+       /* Call chipset specific SMI handlers. This would be the place to
+        * add a CPU or northbridge specific SMI handler, too
+        */
+
        southbridge_smi_handler(node, &state_save);
 
        smi_release_lock();