#include <cpu/x86/mtrr.h>
#include <cpu/x86/cache.h>
+#if CONFIG_GFXUMA
+extern uint64_t uma_memory_base, uma_memory_size;
+#endif
+
static unsigned int mtrr_msr[] = {
MTRRfix64K_00000_MSR, MTRRfix16K_80000_MSR, MTRRfix16K_A0000_MSR,
MTRRfix4K_C0000_MSR, MTRRfix4K_C8000_MSR, MTRRfix4K_D0000_MSR, MTRRfix4K_D8000_MSR,
base.hi = basek >> 22;
base.lo = basek << 10;
- printk_spew("ADDRESS_MASK_HIGH=%#x\n", address_mask_high);
+ printk(BIOS_SPEW, "ADDRESS_MASK_HIGH=%#x\n", address_mask_high);
if (sizek < 4*1024*1024) {
mask.hi = address_mask_high;
return r;
}
-/* fms: find least sigificant bit set */
+/* fls: find least sigificant bit set */
static inline unsigned int fls(unsigned int x)
{
int r;
* ramsize = 156MB == 128MB WB (at 0MB) + 32MB WB (at 128MB) + 4MB UC (at 156MB)
*/
/* 2 MTRRS are reserved for the operating system */
-#if 0
+#if 1
#define BIOS_MTRRS 6
#define OS_MTRRS 2
#else
unsigned long range_startk, unsigned long range_sizek,
unsigned long next_range_startk, unsigned char type, unsigned address_bits)
{
- if (!range_sizek || (reg >= BIOS_MTRRS)) {
+ if (!range_sizek) {
+ /* If there's no MTRR hole, this function will bail out
+ * here when called for the hole.
+ */
+ printk(BIOS_SPEW, "Zero-sized MTRR range @%ldKB\n", range_startk);
+ return reg;
+ }
+
+ if (reg >= BIOS_MTRRS) {
+ printk(BIOS_ERR, "Warning: Out of MTRRs for base: %4ldMB, range: %ldMB, type %s\n",
+ range_startk >>10, range_sizek >> 10,
+ (type==MTRR_TYPE_UNCACHEABLE)?"UC":
+ ((type==MTRR_TYPE_WRBACK)?"WB":"Other") );
return reg;
}
+
while(range_sizek) {
unsigned long max_align, align;
unsigned long sizek;
align = max_align;
}
sizek = 1 << align;
- printk_debug("Setting variable MTRR %d, base: %4dMB, range: %4dMB, type %s\n",
+ printk(BIOS_DEBUG, "Setting variable MTRR %d, base: %4ldMB, range: %4ldMB, type %s\n",
reg, range_startk >>10, sizek >> 10,
(type==MTRR_TYPE_UNCACHEABLE)?"UC":
((type==MTRR_TYPE_WRBACK)?"WB":"Other")
set_var_mtrr(reg++, range_startk, sizek, type, address_bits);
range_startk += sizek;
range_sizek -= sizek;
- if (reg >= BIOS_MTRRS)
+ if (reg >= BIOS_MTRRS) {
+ printk(BIOS_ERR, "Running out of variable MTRRs!\n");
break;
+ }
}
return reg;
}
if (start_mtrr >= NUM_FIXED_RANGES) {
return;
}
- printk_debug("Setting fixed MTRRs(%d-%d) Type: WB\n",
+ printk(BIOS_DEBUG, "Setting fixed MTRRs(%d-%d) Type: WB\n",
start_mtrr, last_mtrr);
set_fixed_mtrrs(start_mtrr, last_mtrr, MTRR_TYPE_WRBACK);
#endif
}
/* Allocate an msr */
- printk_spew(" Allocate an msr - basek = %08x, sizek = %08x,\n", basek, sizek);
+ printk(BIOS_SPEW, " Allocate an msr - basek = %08lx, sizek = %08lx,\n", basek, sizek);
state->range_startk = basek;
state->range_sizek = sizek;
}
* and clear out the mtrrs.
*/
- printk_debug("\n");
+ printk(BIOS_DEBUG, "\n");
/* Initialized the fixed_mtrrs to uncached */
- printk_debug("Setting fixed MTRRs(%d-%d) type: UC\n",
+ printk(BIOS_DEBUG, "Setting fixed MTRRs(%d-%d) Type: UC\n",
0, NUM_FIXED_RANGES);
set_fixed_mtrrs(0, NUM_FIXED_RANGES, MTRR_TYPE_UNCACHEABLE);
search_global_resources(
IORESOURCE_MEM | IORESOURCE_CACHEABLE, IORESOURCE_MEM | IORESOURCE_CACHEABLE,
set_fixed_mtrr_resource, NULL);
- printk_debug("DONE fixed MTRRs\n");
+ printk(BIOS_DEBUG, "DONE fixed MTRRs\n");
/* enable fixed MTRR */
- printk_spew("call enable_fixed_mtrr()\n");
+ printk(BIOS_SPEW, "call enable_fixed_mtrr()\n");
enable_fixed_mtrr();
}
+
void x86_setup_var_mtrrs(unsigned address_bits)
/* this routine needs to know how many address bits a given processor
* supports. CPUs get grumpy when you set too many bits in
#endif
var_state.reg = 0;
var_state.address_bits = address_bits;
+
search_global_resources(
IORESOURCE_MEM | IORESOURCE_CACHEABLE, IORESOURCE_MEM | IORESOURCE_CACHEABLE,
set_var_mtrr_resource, &var_state);
-
+#if (CONFIG_GFXUMA == 1) /* UMA or SP. */
+ // For now we assume the UMA space is at the end of memory
+ if (var_state.hole_startk || var_state.hole_sizek) {
+ printk(BIOS_DEBUG, "Warning: Can't set up MTRR hole for UMA due to pre-existing MTRR hole.\n");
+ } else {
+ // Increase the base range and set up UMA as an UC hole instead
+ var_state.range_sizek += (uma_memory_size >> 10);
+
+ var_state.hole_startk = (uma_memory_base >> 10);
+ var_state.hole_sizek = (uma_memory_size >> 10);
+ }
+#endif
/* Write the last range */
var_state.reg = range_to_mtrr(var_state.reg, var_state.range_startk,
var_state.range_sizek, 0, MTRR_TYPE_WRBACK, var_state.address_bits);
var_state.reg = range_to_mtrr(var_state.reg, var_state.hole_startk,
var_state.hole_sizek, 0, MTRR_TYPE_UNCACHEABLE, var_state.address_bits);
#endif
- printk_debug("DONE variable MTRRs\n");
- printk_debug("Clear out the extra MTRR's\n");
+ printk(BIOS_DEBUG, "DONE variable MTRRs\n");
+ printk(BIOS_DEBUG, "Clear out the extra MTRR's\n");
/* Clear out the extra MTRR's */
while(var_state.reg < MTRRS) {
set_var_mtrr(var_state.reg++, 0, 0, 0, var_state.address_bits);
}
- printk_spew("call enable_var_mtrr()\n");
+ printk(BIOS_SPEW, "call enable_var_mtrr()\n");
enable_var_mtrr();
- printk_spew("Leave %s\n", __FUNCTION__);
+ printk(BIOS_SPEW, "Leave %s\n", __func__);
post_code(0x6A);
}
{
/* Only Pentium Pro and later have MTRR */
msr_t msr;
- printk_debug("\nMTRR check\n");
+ printk(BIOS_DEBUG, "\nMTRR check\n");
msr = rdmsr(0x2ff);
msr.lo >>= 10;
- printk_debug("Fixed MTRRs : ");
+ printk(BIOS_DEBUG, "Fixed MTRRs : ");
if (msr.lo & 0x01)
- printk_debug("Enabled\n");
+ printk(BIOS_DEBUG, "Enabled\n");
else
- printk_debug("Disabled\n");
+ printk(BIOS_DEBUG, "Disabled\n");
- printk_debug("Variable MTRRs: ");
+ printk(BIOS_DEBUG, "Variable MTRRs: ");
if (msr.lo & 0x02)
- printk_debug("Enabled\n");
+ printk(BIOS_DEBUG, "Enabled\n");
else
- printk_debug("Disabled\n");
+ printk(BIOS_DEBUG, "Disabled\n");
- printk_debug("\n");
+ printk(BIOS_DEBUG, "\n");
post_code(0x93);
return ((int) msr.lo);
projects / coreboot.git / blobdiff