SPEEDSTEP: write _CST tables

[coreboot.git] / src / cpu / intel / speedstep / acpi.c

diff --git a/src/cpu/intel/speedstep/acpi.c b/src/cpu/intel/speedstep/acpi.c
index 5bbb52fc02ebcbdb181e45b6e762bf2c06e67bb2..8f32e4f630eebdc0191ae6751d1af8969828a649 100644 (file)
--- a/src/cpu/intel/speedstep/acpi.c
+++ b/src/cpu/intel/speedstep/acpi.c
@@ -1,6 +1,6 @@
 /*
  * This file is part of the coreboot project.
- * 
+ *
  * Copyright (C) 2009 coresystems GmbH
  *
  * This program is free software; you can redistribute it and/or
@@ -25,11 +25,13 @@
 #include <arch/acpigen.h>
 #include <arch/cpu.h>
 #include <cpu/x86/msr.h>
+#include <cpu/intel/acpi.h>
+#include <cpu/intel/speedstep.h>
 #include <device/device.h>
 
 // XXX: PSS table values for power consumption are for Merom only
 
-int determine_total_number_of_cores(void)
+static int determine_total_number_of_cores(void)
 {
        device_t cpu;
        int count = 0;
@@ -46,7 +48,7 @@ int determine_total_number_of_cores(void)
        return count;
 }
 
-int get_fsb(void)
+static int get_fsb(void)
 {
        u32 fsbcode=(rdmsr(0xcd).lo >> 4) & 7;
        switch (fsbcode) {
@@ -56,20 +58,27 @@ int get_fsb(void)
                case 3: return 166;
                case 5: return 100;
        }
-       printk_debug("Warning: No supported FSB frequency. Assuming 200MHz\n");
+       printk(BIOS_DEBUG, "Warning: No supported FSB frequency. Assuming 200MHz\n");
        return 200;
 }
 
+int get_cst_entries(struct cst_entry **entries __attribute__((unused)))
+{
+       return 0;
+}
+
 void generate_cpu_entries(void)
 {
-       int len_sc, len_pr, len_ps;
-       int coreID, cpuID, pcontrol_blk=0x510, plen=6;
+       int len_pr, len_ps;
+       int coreID, cpuID, pcontrol_blk = PMB0_BASE, plen = 6;
        msr_t msr;
-       len_sc = acpigen_write_scope("\\_PR_");
        int totalcores = determine_total_number_of_cores();
        int cores_per_package = (cpuid_ebx(1)>>16) & 0xff;
        int numcpus = totalcores/cores_per_package; // this assumes that all CPUs share the same layout
-       printk_debug("Found %d CPU(s) with %d core(s) each.\n", numcpus, cores_per_package);
+       int count;
+       struct cst_entry *cst_entries;
+
+       printk(BIOS_DEBUG, "Found %d CPU(s) with %d core(s) each.\n", numcpus, cores_per_package);
 
        for (cpuID=1; cpuID <=numcpus; cpuID++) {
                for (coreID=1; coreID<=cores_per_package; coreID++) {
@@ -80,12 +89,12 @@ void generate_cpu_entries(void)
                len_pr = acpigen_write_processor((cpuID-1)*cores_per_package+coreID-1, pcontrol_blk, plen);
                        len_pr += acpigen_write_empty_PCT();
                        len_pr += acpigen_write_PSD_package(cpuID-1,cores_per_package,SW_ANY);
+                       if ((count = get_cst_entries(&cst_entries)) > 0)
+                               len_pr += acpigen_write_CST_package(cst_entries, count);
                        len_pr += acpigen_write_name("_PSS");
 
                        int max_states=8;
                        int busratio_step=2;
-#define IA32_PLATFORM_ID 0x017
-#define IA32_PERF_STS 0x198
                        msr = rdmsr(IA32_PERF_STS);
                        int busratio_min=(msr.lo >> 24) & 0x1f;
                        int busratio_max=(msr.hi >> (40-32)) & 0x1f;
@@ -94,7 +103,7 @@ void generate_cpu_entries(void)
                        int vid_max=msr.lo & 0x3f;
                        int clock_max=get_fsb()*busratio_max;
                        int clock_min=get_fsb()*busratio_min;
-                       printk_debug("clocks between %d and %d MHz.\n", clock_min, clock_max);
+                       printk(BIOS_DEBUG, "clocks between %d and %d MHz.\n", clock_min, clock_max);
 #define MEROM_MIN_POWER 16000
 #define MEROM_MAX_POWER 35000
                        int power_max=MEROM_MAX_POWER;
@@ -105,7 +114,7 @@ void generate_cpu_entries(void)
                                busratio_step <<= 1;
                                num_states >>= 1;
                        }
-                       printk_debug("adding %x P-States between busratio %x and %x, incl. P0\n", num_states+1, busratio_min, busratio_max);
+                       printk(BIOS_DEBUG, "adding %x P-States between busratio %x and %x, incl. P0\n", num_states+1, busratio_min, busratio_max);
                        int vid_step=(vid_max-vid_min)/num_states;
                        int power_step=(power_max-power_min)/num_states;
                        int clock_step=(clock_max-clock_min)/num_states;
@@ -129,9 +138,7 @@ void generate_cpu_entries(void)
                len_pr += len_ps;
                len_pr--;
                acpigen_patch_len(len_pr);
-               len_sc += len_pr;
                }
        }
-       acpigen_patch_len(len_sc-1);
 }