MTRR: get physical address size from CPUID
[coreboot.git] / src / cpu / intel / model_6xx / model_6xx_init.c
index cb7a24836b0aa40185d960a1e068654c66910e3c..5724add4e8111aae5d8960d3f63326560fac3fba 100644 (file)
@@ -14,15 +14,27 @@ static uint32_t microcode_updates[] = {
         * microcode update lengths.  They are encoded in int 8 and 9.  A
         * dummy header of nulls must terminate the list.
         */
-#include "microcode-534-MU16810d.h"
-#include "microcode-535-MU16810e.h"
-#include "microcode-536-MU16810f.h"
-#include "microcode-538-MU168111.h"
 
-#include "microcode-550-MU168307.h"
-#include "microcode-551-MU168308.h"
-#include "microcode-727-MU168313.h"
-#include "microcode-728-MU168314.h"
+#include "microcode-99-B_c6_612.h"
+#include "microcode-43-B_c6_617.h"
+#include "microcode-51-B_c6_616.h"
+#include "microcode-153-d2_619.h"
+
+#include "microcode-308-MU163336.h"
+#include "microcode-309-MU163437.h"
+
+#include "microcode-358-MU166d05.h"
+#include "microcode-359-MU166d06.h"
+#include "microcode-386-MU16600a.h"
+#include "microcode-398-MU166503.h"
+#include "microcode-399-MU166a0b.h"
+#include "microcode-400-MU166a0c.h"
+#include "microcode-401-MU166a0d.h"
+#include "microcode-402-MU166d07.h"
+
+#include "microcode-566-mu26a003.h"
+#include "microcode-588-mu26a101.h"
+#include "microcode-620-MU26a401.h"
 
        /*  Dummy terminator  */
         0x0, 0x0, 0x0, 0x0,
@@ -35,7 +47,7 @@ static void model_6xx_init(device_t dev)
 {
        /* Turn on caching if we haven't already */
        x86_enable_cache();
-       x86_setup_mtrrs(36);
+       x86_setup_mtrrs();
        x86_mtrr_check();
 
        /* Update the microcode */