factor out cpu power management base into a separate file. And fix a bug in

[coreboot.git] / src / cpu / intel / model_106cx / model_106cx_init.c

diff --git a/src/cpu/intel/model_106cx/model_106cx_init.c b/src/cpu/intel/model_106cx/model_106cx_init.c
index af1e23f5a7eb3bdbaeba471e28a60dab2232a1bc..2e38e775a6355a2c59d9aec915df07bd3ffea646 100644 (file)
--- a/src/cpu/intel/model_106cx/model_106cx_init.c
+++ b/src/cpu/intel/model_106cx/model_106cx_init.c
@@ -26,12 +26,21 @@
 #include <cpu/x86/msr.h>
 #include <cpu/x86/lapic.h>
 #include <cpu/intel/microcode.h>
+#include <cpu/intel/speedstep.h>
 #include <cpu/intel/hyperthreading.h>
 #include <cpu/x86/cache.h>
-#include <cpu/x86/mtrr.h>
+#include <cpu/x86/name.h>
 #include <usbdebug.h>
 
 static const uint32_t microcode_updates[] = {
+       #include "microcode-2963-M01106C2217.h"
+       #include "microcode-2964-M04106C2218.h"
+       #include "microcode-2965-M08106C2219.h"
+       #include "microcode-3098-M01106CA107.h"
+       #include "microcode-3101-M04106CA107.h"
+       #include "microcode-3104-M08106CA107.h"
+       #include "microcode-3107-M10106CA107.h"
+
        /*  Dummy terminator  */
         0x0, 0x0, 0x0, 0x0,
         0x0, 0x0, 0x0, 0x0,
@@ -39,38 +48,6 @@ static const uint32_t microcode_updates[] = {
         0x0, 0x0, 0x0, 0x0,
 };
 
-static inline void strcpy(char *dst, char *src)
-{
-       while (*src) *dst++ = *src++;
-}
-
-static void fill_processor_name(char *processor_name)
-{
-       struct cpuid_result regs;
-       char temp_processor_name[49];
-       char *processor_name_start;
-       unsigned int *name_as_ints = (unsigned int *)temp_processor_name;
-       int i;
-
-       for (i=0; i<3; i++) {
-               regs = cpuid(0x80000002 + i);
-               name_as_ints[i*4 + 0] = regs.eax;
-               name_as_ints[i*4 + 1] = regs.ebx;
-               name_as_ints[i*4 + 2] = regs.ecx;
-               name_as_ints[i*4 + 3] = regs.edx;
-       }
-
-       temp_processor_name[48] = 0;
-
-       /* Skip leading spaces */
-       processor_name_start = temp_processor_name;
-       while (*processor_name_start == ' ')
-               processor_name_start++;
-
-       memset(processor_name, 0, 49);
-       strcpy(processor_name, processor_name_start);
-}
-
 #define IA32_FEATURE_CONTROL 0x003a
 
 #define CPUID_VMX (1 << 5)
@@ -106,9 +83,7 @@ static void enable_vmx(void)
 #define PMG_CST_CONFIG_CONTROL 0xe2
 #define PMG_IO_BASE_ADDR       0xe3
 #define PMG_IO_CAPTURE_ADDR    0xe4
-#define PMB0 0x510 /* analogous to P_BLK in cpu.asl */
-#define PMB1 0x0       /* IO port that triggers SMI once cores are in the same state.
-                       See CSM Trigger, at PMG_CST_CONFIG_CONTROL[6:4] */
+
 #define HIGHEST_CLEVEL         3
 static void configure_c_states(void)
 {