printk_foo -> printk(BIOS_FOO, ...)

[coreboot.git] / src / cpu / intel / model_106cx / cache_as_ram_disable.c

diff --git a/src/cpu/intel/model_106cx/cache_as_ram_disable.c b/src/cpu/intel/model_106cx/cache_as_ram_disable.c
index 7808d56f31bfc371076369b8ee70aee2ed3c82e2..b9f7f669f9dc72e4846d139b767a585e6d7582d0 100644 (file)
--- a/src/cpu/intel/model_106cx/cache_as_ram_disable.c
+++ b/src/cpu/intel/model_106cx/cache_as_ram_disable.c
@@ -25,28 +25,6 @@ void stage1_main(unsigned long bist)
 {
        unsigned int cpu_reset = 0;
 
-#if CONFIG_USE_FALLBACK_IMAGE == 1
-        /* Is this a deliberate reset by the bios */
-        if (bios_reset_detected() && last_boot_normal()) {
-                goto normal_image;
-        } else {
-               /* This is the primary cpu how should I boot? */
-               check_cmos_failed();
-               if (do_normal_boot()) {
-                       goto normal_image;
-               }
-               else {
-                       goto fallback_image;
-               }
-       }
- normal_image:
-        __asm__ volatile ("jmp __normal_image"
-                : /* outputs */
-                : "a" (bist) /* inputs */
-                );
- fallback_image:
-#endif
-
        real_main(bist);
 
        /* No servicable parts below this line .. */
@@ -58,12 +36,12 @@ void stage1_main(unsigned long bist)
                        "movl   %%esp, %0\n\t"
                        : "=a" (v_esp)
                );
-               printk_spew("v_esp=%08x\r\n", v_esp);
+               printk(BIOS_SPEW, "v_esp=%08x\r\n", v_esp);
         }
 
 cpu_reset_x:
 
-        printk_spew("cpu_reset = %08x\r\n",cpu_reset);
+        printk(BIOS_SPEW, "cpu_reset = %08x\r\n",cpu_reset);
 
        if(cpu_reset == 0) {
                print_spew("Clearing initial memory region: ");
@@ -85,10 +63,10 @@ cpu_reset_x:
        }
 
        __asm__ volatile (
-                /* set new esp */ /* before _RAMBASE */
-                "subl   %0, %%ebp\n\t"
-                "subl   %0, %%esp\n\t"
-                ::"a"( (CONFIG_DCACHE_RAM_BASE + CONFIG_DCACHE_RAM_SIZE)- CONFIG_RAMBASE )
+                /* set new esp */
+                "movl   %0, %%ebp\n\t"
+                "movl   %0, %%esp\n\t"
+                ::"a"( CONFIG_RAMBASE + (1024-64)*1024 )
        );
 
        {