Since some people disapprove of white space cleanups mixed in regular commits

[coreboot.git] / src / cpu / intel / model_106cx / cache_as_ram.inc

diff --git a/src/cpu/intel/model_106cx/cache_as_ram.inc b/src/cpu/intel/model_106cx/cache_as_ram.inc
index a2c12140a94ceef045cc27b82f6dc278a144c701..873c6e94791ac57bbf43c4177d03767bcb2dd8bf 100644 (file)
--- a/src/cpu/intel/model_106cx/cache_as_ram.inc
+++ b/src/cpu/intel/model_106cx/cache_as_ram.inc
@@ -1,18 +1,18 @@
-/* 
+/*
  * This file is part of the coreboot project.
- * 
+ *
  * Copyright (C) 2000,2007 Ronald G. Minnich <rminnich@gmail.com>
  * Copyright (C) 2007-2008 coresystems GmbH
- * 
+ *
  * This program is free software; you can redistribute it and/or modify
  * it under the terms of the GNU General Public License as published by
  * the Free Software Foundation; version 2 of the License.
- * 
+ *
  * This program is distributed in the hope that it will be useful,
  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  * GNU General Public License for more details.
- * 
+ *
  * You should have received a copy of the GNU General Public License
  * along with this program; if not, write to the Free Software
  * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA  02110-1301 USA
@@ -21,6 +21,7 @@
 #define CACHE_AS_RAM_SIZE CONFIG_DCACHE_RAM_SIZE
 #define CACHE_AS_RAM_BASE CONFIG_DCACHE_RAM_BASE
 
+#include <cpu/x86/stack.h>
 #include <cpu/x86/mtrr.h>
 #include <cpu/amd/mtrr.h>
 
@@ -205,7 +206,7 @@ clear_mtrrs:
        xorl    %eax, %eax
        movl    $((1024*1024) / 4), %ecx
        rep stosl
-       
+
        post_code(0x37)
 #endif
 
@@ -253,24 +254,15 @@ clear_mtrrs:
 __main:
        post_code(0x11)
        cld                     /* clear direction flag */
-       
-       movl    %ebp, %esi
 
-       /* For now: use CONFIG_RAMBASE + 1MB - 64K (counting downwards) as stack. This
-        * makes sure that we stay completely within the 1M-64K of memory that we
-        * preserve for suspend/resume.
-        */
+       movl    %ebp, %esi
 
-#ifndef HIGH_MEMORY_SAVE
-#warning Need a central place for HIGH_MEMORY_SAVE
-#define HIGH_MEMORY_SAVE ( (1024 - 64) * 1024 )
-#endif
-       movl $(CONFIG_RAMBASE + HIGH_MEMORY_SAVE), %esp
+       movl $ROMSTAGE_STACK, %esp
        movl    %esp, %ebp
        pushl %esi
        call copy_and_run
 
-.Lhlt: 
+.Lhlt:
        post_code(0xee)
        hlt
        jmp     .Lhlt