MTRR: get physical address size from CPUID

[coreboot.git] / src / cpu / intel / model_1067x / model_1067x_init.c

diff --git a/src/cpu/intel/model_1067x/model_1067x_init.c b/src/cpu/intel/model_1067x/model_1067x_init.c
index 0452ce711890bc39a2ab99fbdb88c498772fcde8..c6d716d9580beacd44586a6db7df6ac87ee47b59 100644 (file)
--- a/src/cpu/intel/model_1067x/model_1067x_init.c
+++ b/src/cpu/intel/model_1067x/model_1067x_init.c
@@ -28,11 +28,22 @@
 #include <cpu/x86/msr.h>
 #include <cpu/x86/lapic.h>
 #include <cpu/intel/microcode.h>
+#include <cpu/intel/speedstep.h>
 #include <cpu/intel/hyperthreading.h>
 #include <cpu/x86/cache.h>
-#include <cpu/x86/mtrr.h>
+#include <cpu/x86/name.h>
 
 static const uint32_t microcode_updates[] = {
+       #include "microcode-2618-m441067AA07.h"
+       #include "microcode-2626-m1010677705.h"
+       #include "microcode-2498-m101067660C.h"
+       #include "microcode-2497-m041067660C.h"
+       #include "microcode-2499-m401067660C.h"
+       #include "microcode-2617-m111067AA07.h"
+       #include "microcode-2619-mA01067AA07.h"
+       #include "microcode-2623-m011067660C.h"
+       #include "microcode-2501-m801067660C.h"
+
        /*  Dummy terminator  */
         0x0, 0x0, 0x0, 0x0,
         0x0, 0x0, 0x0, 0x0,
@@ -40,11 +51,6 @@ static const uint32_t microcode_updates[] = {
         0x0, 0x0, 0x0, 0x0,
 };
 
-static inline void strcpy(char *dst, char *src)
-{
-       while (*src) *dst++ = *src++;
-}
-
 static void init_timer(void)
 {
        /* Set the apic timer to no interrupts and periodic mode */
@@ -57,33 +63,6 @@ static void init_timer(void)
        lapic_write(LAPIC_TMICT, 0xffffffff);
 }
 
-static void fill_processor_name(char *processor_name)
-{
-       struct cpuid_result regs;
-       char temp_processor_name[49];
-       char *processor_name_start;
-       unsigned int *name_as_ints = (unsigned int *)temp_processor_name;
-       int i;
-
-       for (i=0; i<3; i++) {
-               regs = cpuid(0x80000002 + i);
-               name_as_ints[i*4 + 0] = regs.eax;
-               name_as_ints[i*4 + 1] = regs.ebx;
-               name_as_ints[i*4 + 2] = regs.ecx;
-               name_as_ints[i*4 + 3] = regs.edx;
-       }
-
-       temp_processor_name[48] = 0;
-
-       /* Skip leading spaces */
-       processor_name_start = temp_processor_name;
-       while (*processor_name_start == ' ')
-               processor_name_start++;
-
-       memset(processor_name, 0, 49);
-       strcpy(processor_name, processor_name_start);
-}
-
 #define IA32_FEATURE_CONTROL 0x003a
 
 #define CPUID_VMX (1 << 5)
@@ -120,8 +99,6 @@ static void enable_vmx(void)
 #define PMG_IO_BASE_ADDR       0xe3
 #define PMG_IO_CAPTURE_ADDR    0xe4
 
-#define PMB0_BASE              0x580
-#define PMB1_BASE              0x800
 #define CST_RANGE              2
 static void configure_c_states(void)
 {
@@ -220,7 +197,7 @@ static void model_1067x_init(device_t cpu)
 #endif
 
        /* Setup MTRRs */
-       x86_setup_mtrrs(36);
+       x86_setup_mtrrs();
        x86_mtrr_check();
 
 #if CONFIG_USBDEBUG
@@ -255,6 +232,8 @@ static struct device_operations cpu_dev_ops = {
 
 static struct cpu_device_id cpu_table[] = {
        { X86_VENDOR_INTEL, 0x10676 }, /* Intel Core 2 Solo/Core Duo */
+       { X86_VENDOR_INTEL, 0x10677 },
+       { X86_VENDOR_INTEL, 0x1067A },
        { 0, 0 },
 };