Since some people disapprove of white space cleanups mixed in regular commits

[coreboot.git] / src / cpu / amd / mtrr / amd_mtrr.c

diff --git a/src/cpu/amd/mtrr/amd_mtrr.c b/src/cpu/amd/mtrr/amd_mtrr.c
index 506e017457a2247411d26456734118a094dcb6ab..c113f3f8fa831e7ce0a7aa62f6c8d7860831d954 100644 (file)
--- a/src/cpu/amd/mtrr/amd_mtrr.c
+++ b/src/cpu/amd/mtrr/amd_mtrr.c
@@ -5,7 +5,7 @@
 #include <cpu/x86/cache.h>
 #include <cpu/x86/msr.h>
 
-static unsigned long resk(uint64_t value) 
+static unsigned long resk(uint64_t value)
 {
        unsigned long resultk;
        if (value < (1ULL << 42)) {
@@ -17,7 +17,6 @@ static unsigned long resk(uint64_t value)
        return resultk;
 }
 
-#if 1
 static unsigned fixed_mtrr_index(unsigned long addrk)
 {
        unsigned index;
@@ -34,7 +33,6 @@ static unsigned fixed_mtrr_index(unsigned long addrk)
        return index;
 }
 
-
 static unsigned int mtrr_msr[] = {
        MTRRfix64K_00000_MSR, MTRRfix16K_80000_MSR, MTRRfix16K_A0000_MSR,
        MTRRfix4K_C0000_MSR, MTRRfix4K_C8000_MSR, MTRRfix4K_D0000_MSR, MTRRfix4K_D8000_MSR,
@@ -97,29 +95,30 @@ static void set_fixed_mtrr_resource(void *gp, struct device *dev, struct resourc
        if (start_mtrr >= NUM_FIXED_RANGES) {
                return;
        }
-       printk_debug("Setting fixed MTRRs(%d-%d) Type: WB\n",
+       printk(BIOS_DEBUG, "Setting fixed MTRRs(%d-%d) Type: WB, RdMEM, WrMEM\n",
                start_mtrr, last_mtrr);
        set_fixed_mtrrs(start_mtrr, last_mtrr, MTRR_TYPE_WRBACK | MTRR_READ_MEM | MTRR_WRITE_MEM);
-       
-}
-
 
-#endif
+}
 
 void amd_setup_mtrrs(void)
 {
+       unsigned long address_bits;
        struct mem_state state;
        unsigned long i;
        msr_t msr;
 
+
        /* Enable the access to AMD RdDram and WrDram extension bits */
+       disable_cache();
        msr = rdmsr(SYSCFG_MSR);
        msr.lo |= SYSCFG_MSR_MtrrFixDramModEn;
        wrmsr(SYSCFG_MSR, msr);
+       enable_cache();
 
-       printk_debug("\n");
+       printk(BIOS_DEBUG, "\n");
        /* Initialized the fixed_mtrrs to uncached */
-       printk_debug("Setting fixed MTRRs(%d-%d) type: UC\n", 
+       printk(BIOS_DEBUG, "Setting fixed MTRRs(%d-%d) type: UC\n",
                0, NUM_FIXED_RANGES);
        set_fixed_mtrrs(0, NUM_FIXED_RANGES, MTRR_TYPE_UNCACHEABLE);
 
@@ -131,7 +130,8 @@ void amd_setup_mtrrs(void)
        search_global_resources(
                IORESOURCE_MEM | IORESOURCE_CACHEABLE, IORESOURCE_MEM | IORESOURCE_CACHEABLE,
                set_fixed_mtrr_resource, &state);
-       printk_debug("DONE fixed MTRRs\n");
+       printk(BIOS_DEBUG, "DONE fixed MTRRs\n");
+
        if (state.mmio_basek > state.tomk) {
                state.mmio_basek = state.tomk;
        }
@@ -147,10 +147,12 @@ void amd_setup_mtrrs(void)
        msr.lo = state.mmio_basek << 10;
        wrmsr(TOP_MEM, msr);
 
-       /* Setup TOP_MEM2 */
-       msr.hi = state.tomk >> 22;
-       msr.lo = state.tomk << 10;
-       wrmsr(TOP_MEM2, msr);
+       if(state.tomk > (4*1024*1024)) {
+               /* Setup TOP_MEM2 */
+               msr.hi = state.tomk >> 22;
+               msr.lo = state.tomk << 10;
+               wrmsr(TOP_MEM2, msr);
+       }
 
        /* zero the IORR's before we enable to prevent
         * undefined side effects.
@@ -160,7 +162,7 @@ void amd_setup_mtrrs(void)
                wrmsr(i, msr);
        }
 
-       /* Enable Variable Mtrrs 
+       /* Enable Variable Mtrrs
         * Enable the RdMem and WrMem bits in the fixed mtrrs.
         * Disable access to the RdMem and WrMem in the fixed mtrr.
         */
@@ -169,10 +171,17 @@ void amd_setup_mtrrs(void)
        msr.lo &= ~SYSCFG_MSR_MtrrFixDramModEn;
        wrmsr(SYSCFG_MSR, msr);
 
+       enable_fixed_mtrr();
+
        enable_cache();
 
+       /* FIXME we should probably query the cpu for this
+        * but so far this is all any recent AMD cpu has supported.
+        */
+       address_bits = CONFIG_CPU_ADDR_BITS; //K8 could be 40, and GH could be 48
+
        /* Now that I have mapped what is memory and what is not
         * Setup the mtrrs so we can cache the memory.
         */
-       x86_setup_mtrrs();
+       x86_setup_var_mtrrs(address_bits);
 }