call cache_as_ram_main
done_cache_as_ram_main:
- /* If you wanted to maintain the stack in memory you would need to set the tags as dirty
- so the wbinvd would push out the old stack contents to memory */
- /* Clear the cache, the following code from crt0.S.lb will setup a new stack*/
+ /* We now run over the stack-in-cache, copying it back to itself to invalidate the cache */
+
+ push %edi
+ mov $(CONFIG_DCACHE_RAM_SIZE/4),%ecx
+ push %esi
+ mov $(CONFIG_DCACHE_RAM_BASE),%edi
+ mov %edi,%esi
+ cld
+ rep movsl %ds:(%esi),%es:(%edi)
+ pop %esi
+ pop %edi
+
+ /* Clear the cache out to ram */
wbinvd
-
-/* the following code is from crt0.S.lb */
-/* This takes the place of the post-CAR funtions that the K8 uses to setup the stack and copy LB low.*/
-
-#ifndef CONSOLE_DEBUG_TX_STRING
- /* uses: esp, ebx, ax, dx */
-# define __CRT_CONSOLE_TX_STRING(string) \
- mov string, %ebx ; \
- CALLSP(crt_console_tx_string)
-
-# if defined(CONFIG_TTYS0_BASE) && (ASM_CONSOLE_LOGLEVEL > BIOS_DEBUG)
-# define CONSOLE_DEBUG_TX_STRING(string) __CRT_CONSOLE_TX_STRING(string)
-# else
-# define CONSOLE_DEBUG_TX_STRING(string)
-# endif
-#endif
+ /* re-enable the cache */
+ movl %cr0, %eax
+ xorl $(CR0_CD + CR0_NW), %eax /* clear the CD and NW bits */
+ movl %eax, %cr0
/* clear boot_complete flag */
xorl %ebp, %ebp
__main:
- CONSOLE_DEBUG_TX_STRING($str_copying_to_ram)
/*
* Copy data into RAM and clear the BSS. Since these segments
* the location it is compiled to run at.
* Normally this is copying from FLASH ROM to RAM.
*/
-#if !CONFIG_COMPRESS
- movl $_liseg, %esi
- movl $_iseg, %edi
- movl $_eiseg, %ecx
- subl %edi, %ecx
- movb %cl, %al
- shrl $2, %ecx
- andb $3, %al
- rep movsl
- movb %al, %cl
- rep movsb
-#else
- leal 4+_liseg, %esi
- leal _iseg, %edi
- movl %ebp, %esp /* preserve %ebp */
- movl $-1, %ebp /* last_m_off = -1 */
- jmp dcl1_n2b
-
-/* ------------- DECOMPRESSION -------------
-
- Input:
- %esi - source
- %edi - dest
- %ebp - -1
- cld
-
- Output:
- %eax - 0
- %ecx - 0
-*/
-
-.macro getbit bits
-.if \bits == 1
- addl %ebx, %ebx
- jnz 1f
-.endif
- movl (%esi), %ebx
- subl $-4, %esi /* sets carry flag */
- adcl %ebx, %ebx
-1:
-.endm
-
-decompr_literals_n2b:
- movsb
-
-decompr_loop_n2b:
- addl %ebx, %ebx
- jnz dcl2_n2b
-dcl1_n2b:
- getbit 32
-dcl2_n2b:
- jc decompr_literals_n2b
- xorl %eax, %eax
- incl %eax /* m_off = 1 */
-loop1_n2b:
- getbit 1
- adcl %eax, %eax /* m_off = m_off*2 + getbit() */
- getbit 1
- jnc loop1_n2b /* while(!getbit()) */
- xorl %ecx, %ecx
- subl $3, %eax
- jb decompr_ebpeax_n2b /* if (m_off == 2) goto decompr_ebpeax_n2b ? */
- shll $8, %eax
- movb (%esi), %al /* m_off = (m_off - 3)*256 + src[ilen++] */
- incl %esi
- xorl $-1, %eax
- jz decompr_end_n2b /* if (m_off == 0xffffffff) goto decomp_end_n2b */
- movl %eax, %ebp /* last_m_off = m_off ?*/
-decompr_ebpeax_n2b:
- getbit 1
- adcl %ecx, %ecx /* m_len = getbit() */
- getbit 1
- adcl %ecx, %ecx /* m_len = m_len*2 + getbit()) */
- jnz decompr_got_mlen_n2b /* if (m_len == 0) goto decompr_got_mlen_n2b */
- incl %ecx /* m_len++ */
-loop2_n2b:
- getbit 1
- adcl %ecx, %ecx /* m_len = m_len*2 + getbit() */
- getbit 1
- jnc loop2_n2b /* while(!getbit()) */
- incl %ecx
- incl %ecx /* m_len += 2 */
-decompr_got_mlen_n2b:
- cmpl $-0xd00, %ebp
- adcl $1, %ecx /* m_len = m_len + 1 + (last_m_off > 0xd00) */
- movl %esi, %edx
- leal (%edi,%ebp), %esi /* m_pos = dst + olen + -m_off */
- rep
- movsb /* dst[olen++] = *m_pos++ while(m_len > 0) */
- movl %edx, %esi
- jmp decompr_loop_n2b
-decompr_end_n2b:
- intel_chip_post_macro(0x12) /* post 12 */
-
- movl %esp, %ebp
-#endif
-
- CONSOLE_DEBUG_TX_STRING($str_pre_main)
- leal _iseg, %edi
- jmp *%edi
+ movl %ebp, %esi
+ pushl %esi
+ pushl $str_coreboot_ram_name
+ call cbfs_and_run_core
.Lhlt:
intel_chip_post_macro(0xee) /* post fail ee */
.previous
#endif /* ASM_CONSOLE_LOGLEVEL > BIOS_DEBUG */
+str_coreboot_ram_name: .ascii CONFIG_CBFS_PREFIX
+ .string "/coreboot_ram"
projects / coreboot.git / blobdiff