New revision guide September 2009 3.46

[coreboot.git] / src / cpu / amd / model_fxx / model_fxx_init.c

diff --git a/src/cpu/amd/model_fxx/model_fxx_init.c b/src/cpu/amd/model_fxx/model_fxx_init.c
index 2bae476bc10fa7e22d8673874f362acc48fe93fe..5051dfd7b0472223a0e4a27ad5089b8e2690e0d1 100644 (file)
--- a/src/cpu/amd/model_fxx/model_fxx_init.c
+++ b/src/cpu/amd/model_fxx/model_fxx_init.c
@@ -32,15 +32,15 @@
 
 void cpus_ready_for_init(void)
 {
-#if MEM_TRAIN_SEQ == 1
-        struct sys_info *sysinfox = (struct sys_info *)((CONFIG_LB_MEM_TOPK<<10) - DCACHE_RAM_GLOBAL_VAR_SIZE);
+#if CONFIG_MEM_TRAIN_SEQ == 1
+        struct sys_info *sysinfox = (struct sys_info *)((CONFIG_RAMTOP) - CONFIG_DCACHE_RAM_GLOBAL_VAR_SIZE);
         // wait for ap memory to trained
         wait_all_core0_mem_trained(sysinfox);
 #endif
 }
 
 
-#if K8_REV_F_SUPPORT == 0
+#if CONFIG_K8_REV_F_SUPPORT == 0
 int is_e0_later_in_bsp(int nodeid)
 {
         uint32_t val;
@@ -67,7 +67,7 @@ int is_e0_later_in_bsp(int nodeid)
 }
 #endif
 
-#if K8_REV_F_SUPPORT == 1
+#if CONFIG_K8_REV_F_SUPPORT == 1
 int is_cpu_f0_in_bsp(int nodeid)
 {
         uint32_t dword;
@@ -182,7 +182,7 @@ static void set_init_ecc_mtrrs(void)
        msr.lo = 0x00000000 | MTRR_TYPE_WRBACK;
        wrmsr(MTRRphysBase_MSR(0), msr);
        msr.hi = 0x000000ff;
-       msr.lo = ~((CONFIG_LB_MEM_TOPK << 10) - 1) | 0x800;
+       msr.lo = ~((CONFIG_RAMTOP) - 1) | 0x800;
        wrmsr(MTRRphysMask_MSR(0), msr);
 
        /* Set the default type to write combining */
@@ -248,7 +248,7 @@ static void init_ecc_memory(unsigned node_id)
        struct mtrr_state mtrr_state;
 
        device_t f1_dev, f2_dev, f3_dev;
-       uint32_t enable_scrubbing;
+       int enable_scrubbing;
        uint32_t dcl;
 
        f1_dev = dev_find_slot(0, PCI_DEVFN(0x18 + node_id, 1));
@@ -266,7 +266,7 @@ static void init_ecc_memory(unsigned node_id)
 
        /* See if we scrubbing should be enabled */
        enable_scrubbing = 1;
-       get_option("hw_scrubber", &enable_scrubbing);
+       get_option(&enable_scrubbing, "hw_scrubber");
 
        /* Enable cache scrubbing at the lowest possible rate */
        if (enable_scrubbing) {
@@ -289,8 +289,8 @@ static void init_ecc_memory(unsigned node_id)
        startk = (pci_read_config32(f1_dev, 0x40 + (node_id*8)) & 0xffff0000) >> 2;
        endk   = ((pci_read_config32(f1_dev, 0x44 + (node_id*8)) & 0xffff0000) >> 2) + 0x4000;
 
-#if HW_MEM_HOLE_SIZEK != 0
-       #if K8_REV_F_SUPPORT == 0
+#if CONFIG_HW_MEM_HOLE_SIZEK != 0
+       #if CONFIG_K8_REV_F_SUPPORT == 0
         if (!is_cpu_pre_e0()) 
        {
        #endif
@@ -300,7 +300,7 @@ static void init_ecc_memory(unsigned node_id)
                 if(val & 1) {
                        hole_startk = ((val & (0xff<<24)) >> 10);
                 }
-       #if K8_REV_F_SUPPORT == 0
+       #if CONFIG_K8_REV_F_SUPPORT == 0
         }
        #endif
 #endif
@@ -308,8 +308,8 @@ static void init_ecc_memory(unsigned node_id)
 
        /* Don't start too early */
        begink = startk;
-       if (begink < CONFIG_LB_MEM_TOPK) { 
-               begink = CONFIG_LB_MEM_TOPK;
+       if (begink < (CONFIG_RAMTOP >> 10)) {
+               begink = (CONFIG_RAMTOP >>10);
        }
 
        printk_debug("Clearing memory %luK - %luK: ", begink, endk);
@@ -322,7 +322,7 @@ static void init_ecc_memory(unsigned node_id)
        disable_lapic();
 
        /* Walk through 2M chunks and zero them */
-#if HW_MEM_HOLE_SIZEK != 0
+#if CONFIG_HW_MEM_HOLE_SIZEK != 0
        /* here hole_startk can not be equal to begink, never. Also hole_startk is in 2M boundary, 64M? */
         if ( (hole_startk != 0) && ((begink < hole_startk) && (endk>(4*1024*1024)))) {
                        for(basek = begink; basek < hole_startk;
@@ -368,7 +368,7 @@ static void init_ecc_memory(unsigned node_id)
 static inline void k8_errata(void)
 {
        msr_t msr;
-#if K8_REV_F_SUPPORT == 0
+#if CONFIG_K8_REV_F_SUPPORT == 0
        if (is_cpu_pre_c0()) {
                /* Erratum 63... */
                msr = rdmsr(HWCR_MSR);
@@ -438,7 +438,7 @@ static inline void k8_errata(void)
        }
 #endif
 
-#if K8_REV_F_SUPPORT == 0
+#if CONFIG_K8_REV_F_SUPPORT == 0
        if (!is_cpu_pre_e0()) 
 #endif
        {
@@ -453,7 +453,7 @@ static inline void k8_errata(void)
        msr.lo |= 1 << 6;
        wrmsr(HWCR_MSR, msr);
 
-#if K8_REV_F_SUPPORT == 1
+#if CONFIG_K8_REV_F_SUPPORT == 1
         /* Erratum 131... */
         msr = rdmsr(NB_CFG_MSR);
         msr.lo |= 1 << 20;
@@ -478,7 +478,7 @@ void model_fxx_init(device_t dev)
        unsigned siblings;
 #endif
 
-#if K8_REV_F_SUPPORT == 1
+#if CONFIG_K8_REV_F_SUPPORT == 1
        struct cpuinfo_x86 c;
        
        get_fms(&c, dev->device);
@@ -564,7 +564,7 @@ static struct device_operations cpu_dev_ops = {
 };
 
 static struct cpu_device_id cpu_table[] = {
-#if K8_REV_F_SUPPORT == 0
+#if CONFIG_K8_REV_F_SUPPORT == 0
        { X86_VENDOR_AMD, 0xf40 },   /* SH-B0 (socket 754) */
        { X86_VENDOR_AMD, 0xf50 },   /* SH-B0 (socket 940) */
        { X86_VENDOR_AMD, 0xf51 },   /* SH-B3 (socket 940) */
@@ -606,7 +606,7 @@ static struct cpu_device_id cpu_table[] = {
        { X86_VENDOR_AMD, 0x30ff2 }, /* E4 ? */
 #endif
 
-#if K8_REV_F_SUPPORT == 1
+#if CONFIG_K8_REV_F_SUPPORT == 1
        /*
         * AMD F0 support.
         *
@@ -631,6 +631,7 @@ static struct cpu_device_id cpu_table[] = {
        { X86_VENDOR_AMD, 0x40fc2 }, /* DH-F2 (socket S1g1) */
        { X86_VENDOR_AMD, 0x40f13 }, /* JH-F3 (socket F/1207) */
        { X86_VENDOR_AMD, 0x40f33 }, /* JH-F3 (socket AM2) */
+       { X86_VENDOR_AMD, 0x50fd3 }, /* JH-F3 (socket F/1207) */
        { X86_VENDOR_AMD, 0xc0f13 }, /* JH-F3 (socket F/1207) */
        { X86_VENDOR_AMD, 0x50ff3 }, /* DH-F3 (socket AM2) */
        { X86_VENDOR_AMD, 0x60fb1 }, /* BH-G1 (socket AM2) */
@@ -639,6 +640,7 @@ static struct cpu_device_id cpu_table[] = {
        { X86_VENDOR_AMD, 0x60f82 }, /* BH-G2 (socket S1g1) */
        { X86_VENDOR_AMD, 0x70ff1 }, /* DH-G1 (socket AM2) */
        { X86_VENDOR_AMD, 0x60ff2 }, /* DH-G2 (socket AM2) */
+       { X86_VENDOR_AMD, 0x70ff2 }, /* DH-G2 (socket AM2) */
        { X86_VENDOR_AMD, 0x60fc2 }, /* DH-G2 (socket S1g1) */
        { X86_VENDOR_AMD, 0x70fc2 }, /* DH-G2 (socket S1g1) */
 #endif