Update to the latest AMD Fam10 microcode patches.

[coreboot.git] / src / cpu / amd / model_10xxx / update_microcode.c

diff --git a/src/cpu/amd/model_10xxx/update_microcode.c b/src/cpu/amd/model_10xxx/update_microcode.c
index 8233247962bd3a8976e2441a426b2b634ca05bf4..8b61a6e5df8159a0ebe6cd1d27f2ee10ea8c8848 100644 (file)
--- a/src/cpu/amd/model_10xxx/update_microcode.c
+++ b/src/cpu/amd/model_10xxx/update_microcode.c
@@ -31,14 +31,22 @@ static const u8 microcode_updates[] __attribute__ ((aligned(16))) = {
 
 #ifdef __ROMCC__
 
-       // Barcelona revAx
-//             #include "mc_patch_01000020.h"
-
-       // Barcelona revBx
-               #include "mc_patch_01000033.h"
+/* From the Revision Guide :
+ * Equivalent Processor Table for AMD Family 10h Processors
+ *
+ * Installed Processor   Equivalent Processor   Patch Level
+ * Revision ID           Revision ID
+ * 00100F00h             1000h                  01000020h
+ * 00100F01h             1000h                  01000020h
+ * 00100F02h             1000h                  01000020h
+ * 00100F20h             1020h                  01000084h
+ * 00100F21h             1020h                  01000084h
+ * 00100F2Ah             1020h                  01000084h
+ * 00100F22h             1022h                  01000083h
+ * 00100F23h             1022h                  01000083h
+ */
 
-       // Barcelona rev Cx??
-//             #include "mc_patch_01000035.h"
+#include AMD_UCODE_PATCH_FILE
 
 #endif
        /*  Dummy terminator  */
@@ -57,6 +65,7 @@ static u32 get_equivalent_processor_rev_id(u32 orig_id) {
                0x100f21, 0x1020,
                0x100f2A, 0x1020,
                0x100f22, 0x1022,
+               0x100f23, 0x1022,
        };
 
        u32 new_id;