*/
-#ifndef __ROMCC__
+#ifndef __PRE_RAM__
#include <console/console.h>
#include <device/device.h>
#include <device/pci.h>
static const u8 microcode_updates[] __attribute__ ((aligned(16))) = {
-#ifdef __ROMCC__
+#ifdef __PRE_RAM__
- // Barcelona rev Ax
-// #include "mc_patch_01000020.h"
-
- // Barcelona rev B0, B1, BA
-// #include "mc_patch_01000066.h"
+/* From the Revision Guide :
+ * Equivalent Processor Table for AMD Family 10h Processors
+ *
+ * Installed Processor Equivalent Processor Patch Level
+ * Revision ID Revision ID
+ * 00100F00h 1000h 01000020h
+ * 00100F01h 1000h 01000020h
+ * 00100F02h 1000h 01000020h
+ * 00100F20h 1020h 01000096h
+ * 00100F21h (DR-B1) 1020h 01000096h
+ * 00100F2Ah (DR-BA) 1020h 01000096h
+ * 00100F22h (DR-B2) 1022h 01000095h
+ * 00100F23h (DR-B3) 1022h 01000095h
+ * 00100F42h (RB-C2) 1041h 01000086h
+ * 00100F62h (DA-C2) 1062h 0100009Fh
+ */
- // Barcelona rev B2, B3
- #include "mc_patch_01000065.h"
+#include CONFIG_AMD_UCODE_PATCH_FILE
#endif
/* Dummy terminator */
0x100f2A, 0x1020,
0x100f22, 0x1022,
0x100f23, 0x1022,
+ 0x100f42, 0x1041,
+ 0x100f62, 0x1062,
};
u32 new_id;
if (equivalent_processor_rev_id != 0) {
amd_update_microcode((void *) microcode_updates, equivalent_processor_rev_id);
} else {
- printk_debug("microcode: rev id not found. Skipping microcode patch!\n");
+ printk(BIOS_DEBUG, "microcode: rev id not found. Skipping microcode patch!\n");
}
}