Move "select CACHE_AS_RAM" lines from boards into CPU socket.

[coreboot.git] / src / cpu / amd / model_10xxx / Kconfig

diff --git a/src/cpu/amd/model_10xxx/Kconfig b/src/cpu/amd/model_10xxx/Kconfig
index 974eed69bcf42345b985445755c01329afc68e9d..539e1116a8ebb37e1eb2c6f1c0a6caf48d7e8f5e 100644 (file)
--- a/src/cpu/amd/model_10xxx/Kconfig
+++ b/src/cpu/amd/model_10xxx/Kconfig
@@ -1,32 +1,52 @@
 config CPU_AMD_MODEL_10XXX
        bool
-       select HAVE_MOVNTI
-       select USE_PRINTK_IN_CAR
-       select USE_DCACHE_RAM
        select SSE
-       select HAVE_INIT_TIMER
+       select SSE2
 
+if CPU_AMD_MODEL_10XXX
 config CPU_ADDR_BITS
        int
        default 48
-       depends on CPU_AMD_MODEL_10XXX
 
 config DCACHE_RAM_BASE
        hex
        default 0xc4000
-       depends on CPU_AMD_MODEL_10XXX
 
 config DCACHE_RAM_SIZE
        hex
        default 0x0c000
-       depends on CPU_AMD_MODEL_10XXX
 
 config DCACHE_RAM_GLOBAL_VAR_SIZE
        hex
        default 0x04000
-       depends on CPU_AMD_MODEL_10XXX
 
 config UDELAY_IO
        bool
        default n
-       depends on CPU_AMD_MODEL_10XXX
+
+config SET_FIDVID
+       bool
+       default y
+
+if SET_FIDVID
+config SET_FIDVID_DEBUG
+       bool
+       default y
+
+config SET_FIDVID_STORE_AP_APICID_AT_FIRST
+       bool
+       default y
+
+config SET_FIDVID_CORE0_ONLY
+       bool
+       default n
+
+# 0: all cores
+# 1: core 0 only
+# 2: all but core 0
+config SET_FIDVID_CORE_RANGE
+       int
+       default 0
+
+endif
+endif