Move "select CACHE_AS_RAM" lines from boards into CPU socket.

[coreboot.git] / src / cpu / amd / model_10xxx / Kconfig

diff --git a/src/cpu/amd/model_10xxx/Kconfig b/src/cpu/amd/model_10xxx/Kconfig
index 0e308a27a1656017207067b23f2e32e981c739fc..539e1116a8ebb37e1eb2c6f1c0a6caf48d7e8f5e 100644 (file)
--- a/src/cpu/amd/model_10xxx/Kconfig
+++ b/src/cpu/amd/model_10xxx/Kconfig
@@ -1,44 +1,52 @@
 config CPU_AMD_MODEL_10XXX
        bool
-       default n
-
-config HAVE_INIT_TIMER
-       bool
-       default y
-       depends on CPU_AMD_MODEL_10XXX
-
-config HAVE_MOVNTI
-       bool
-       default y
-       depends on CPU_AMD_MODEL_10XXX
+       select SSE
+       select SSE2
 
+if CPU_AMD_MODEL_10XXX
 config CPU_ADDR_BITS
        int
        default 48
-       depends on CPU_AMD_MODEL_10XXX
-
-config USE_PRINTK_IN_CAR
-       bool
-       default y
-       depends on CPU_AMD_MODEL_10XXX
-
-config USE_DCACHE_RAM
-       bool
-       default y
-       depends on CPU_AMD_MODEL_10XXX
 
 config DCACHE_RAM_BASE
        hex
-       default 0xc8000
-       depends on CPU_AMD_MODEL_10XXX
+       default 0xc4000
 
 config DCACHE_RAM_SIZE
        hex
-       default 0x08000
-       depends on CPU_AMD_MODEL_10XXX
+       default 0x0c000
 
 config DCACHE_RAM_GLOBAL_VAR_SIZE
        hex
-       default 0x01000
-       depends on CPU_AMD_MODEL_10XXX
+       default 0x04000
+
+config UDELAY_IO
+       bool
+       default n
+
+config SET_FIDVID
+       bool
+       default y
+
+if SET_FIDVID
+config SET_FIDVID_DEBUG
+       bool
+       default y
+
+config SET_FIDVID_STORE_AP_APICID_AT_FIRST
+       bool
+       default y
+
+config SET_FIDVID_CORE0_ONLY
+       bool
+       default n
+
+# 0: all cores
+# 1: core 0 only
+# 2: all but core 0
+config SET_FIDVID_CORE_RANGE
+       int
+       default 0
 
+endif
+endif