pci: set BUILD_PCIMEM_START to 0xe0000000
[seabios.git] / src / config.h
index 5b4048830db06ad25281469d89e8c102dd1bee70..f2fce89ef1ce1bd2a67bd9f7fbebe9202499b87d 100644 (file)
 #define CONFIG_APPNAME6 "BOCHS "
 #define CONFIG_APPNAME4 "BXPC"
 
-// When option roms are not pre-deployed, SeaBIOS can copy an optionrom
-// from flash for up to 2 devices.
-#define OPTIONROM_VENDEV_1 0x00000000
-#define OPTIONROM_MEM_1 0x00000000
-#define OPTIONROM_VENDEV_2 0x00000000
-#define OPTIONROM_MEM_2 0x00000000
-
 // Maximum number of map entries in the e820 map
 #define CONFIG_MAX_E820 32
 // Space to reserve in f-segment for dynamic allocations
 #define BUILD_BIOS_TMP_ADDR       0x30000
 #define BUILD_MAX_HIGHMEM         0xe0000000
 
-// Support old pci mem assignment behaviour
-//#define CONFIG_OLD_PCIMEM_ASSIGNMENT    1
-#if CONFIG_OLD_PCIMEM_ASSIGNMENT
-#define BUILD_PCIMEM_START        0xf0000000
+#define BUILD_PCIMEM_START        0xe0000000
 #define BUILD_PCIMEM_SIZE         (BUILD_PCIMEM_END - BUILD_PCIMEM_START)
 #define BUILD_PCIMEM_END          0xfec00000    /* IOAPIC is mapped at */
-#define BUILD_PCIPREFMEM_START    0
-#define BUILD_PCIPREFMEM_SIZE     0
-#define BUILD_PCIPREFMEM_END      0
-#else
-#define BUILD_PCIMEM_START        0xf0000000
-#define BUILD_PCIMEM_SIZE         0x08000000    /* half- of pci window */
-#define BUILD_PCIMEM_END          (BUILD_PCIMEM_START + BUILD_PCIMEM_SIZE)
-#define BUILD_PCIPREFMEM_START    BUILD_PCIMEM_END
-#define BUILD_PCIPREFMEM_SIZE     (BUILD_PCIPREFMEM_END - BUILD_PCIPREFMEM_START)
-#define BUILD_PCIPREFMEM_END      0xfec00000    /* IOAPIC is mapped at */
-#endif
 
 #define BUILD_APIC_ADDR           0xfee00000
 #define BUILD_IOAPIC_ADDR         0xfec00000