add ahci support

[seabios.git] / src / config.h

diff --git a/src/config.h b/src/config.h
index e7624355d77637cfefc55df9c03dc03b307ff26f..db3e578abb2008241c429c6f5ffeffed8677bba6 100644 (file)
--- a/src/config.h
+++ b/src/config.h
@@ -26,6 +26,8 @@
 #define CONFIG_THREADS 1
 // Allow hardware init to run in parallel with optionrom execution
 #define CONFIG_THREAD_OPTIONROMS 0
+// Support relocating the one time initialization code to high memory
+#define CONFIG_RELOCATE_INIT 1
 // Support int13 disk/floppy drive functions
 #define CONFIG_DRIVES 1
 // Support floppy drive access
@@ -44,6 +46,8 @@
 #define CONFIG_USB_HUB 1
 // Support USB keyboards
 #define CONFIG_USB_KEYBOARD 1
+// Support USB mice
+#define CONFIG_USB_MOUSE 1
 // Support PS2 ports (keyboard and mouse)
 #define CONFIG_PS2PORT 1
 // Support for IDE disk code
@@ -52,6 +56,8 @@
 #define CONFIG_ATA_DMA 0
 // Use 32bit PIO accesses on ATA (minor optimization on PCI transfers)
 #define CONFIG_ATA_PIO32 0
+// Support for AHCI disk code
+#define CONFIG_AHCI 0
 // Support for booting from a CD
 #define CONFIG_CDROM_BOOT 1
 // Support for emulating a boot CD as a floppy/harddrive
@@ -119,6 +125,8 @@
 #define CONFIG_S3_RESUME 1
 // Run the vga rom during S3 resume.
 #define CONFIG_S3_RESUME_VGA_INIT 0
+// Support boot splash
+#define CONFIG_BOOTSPLASH 1
 // define it if the (emulated) hardware supports SMM mode
 #define CONFIG_USE_SMM 1
 // Maximum number of map entries in the e820 map
@@ -134,6 +142,9 @@
 #define CONFIG_SUBMODEL_ID   0x00
 #define CONFIG_BIOS_REVISION 0x01
 
+// Support boot from virtio storage
+#define CONFIG_VIRTIO_BLK 1
+
 // Various memory addresses used by the code.
 #define BUILD_STACK_ADDR          0x7000
 #define BUILD_S3RESUME_STACK_ADDR 0x1000
@@ -146,7 +157,24 @@
 // 32KB for shadow ram copying (works around emulator deficiencies)
 #define BUILD_BIOS_TMP_ADDR       0x30000
 #define BUILD_MAX_HIGHMEM         0xe0000000
+
+// Support old pci mem assignment behaviour
+//#define CONFIG_OLD_PCIMEM_ASSIGNMENT    1
+#if CONFIG_OLD_PCIMEM_ASSIGNMENT
+#define BUILD_PCIMEM_START        0xf0000000
+#define BUILD_PCIMEM_SIZE         (BUILD_PCIMEM_END - BUILD_PCIMEM_START)
+#define BUILD_PCIMEM_END          0xfec00000    /* IOAPIC is mapped at */
+#define BUILD_PCIPREFMEM_START    0
+#define BUILD_PCIPREFMEM_SIZE     0
+#define BUILD_PCIPREFMEM_END      0
+#else
 #define BUILD_PCIMEM_START        0xf0000000
+#define BUILD_PCIMEM_SIZE         0x08000000    /* half- of pci window */
+#define BUILD_PCIMEM_END          (BUILD_PCIMEM_START + BUILD_PCIMEM_SIZE)
+#define BUILD_PCIPREFMEM_START    BUILD_PCIMEM_END
+#define BUILD_PCIPREFMEM_SIZE     (BUILD_PCIPREFMEM_END - BUILD_PCIPREFMEM_START)
+#define BUILD_PCIPREFMEM_END      0xfec00000    /* IOAPIC is mapped at */
+#endif
 
 #define BUILD_APIC_ADDR           0xfee00000
 #define BUILD_IOAPIC_ADDR         0xfec00000