When enabling write access to 0xf0000, just copy from 0xffff0000.

[seabios.git] / src / config.h

diff --git a/src/config.h b/src/config.h
index 8c4b2f0293408f8bb181d03e8be68434259fa83d..cba7ac4b07e6580f849d79e0f323b9c488fe6434 100644 (file)
--- a/src/config.h
+++ b/src/config.h
@@ -25,12 +25,10 @@
 
 // Support for int13 floppy drive access
 #define CONFIG_FLOPPY_SUPPORT 1
-// Support for int15c2 mouse calls
-#define CONFIG_PS2_MOUSE 1
 // Support for IDE disk code
 #define CONFIG_ATA 1
-// Support calling int155f on each keyboard event
-#define CONFIG_KBD_CALL_INT15_4F 1
+// Use 32bit PIO accesses on ATA (minor optimization on PCI transfers)
+#define CONFIG_ATA_PIO32 0
 // Support for booting from a CD
 #define CONFIG_CDROM_BOOT 1
 // Support for emulating a boot CD as a floppy/harddrive
@@ -43,24 +41,40 @@
 #define CONFIG_PNPBIOS 1
 // Support int 19/18 system bootup support
 #define CONFIG_BOOT 1
+// Support an interactive boot menu at end of post.
+#define CONFIG_BOOTMENU 1
+// Amount of time (in ms) to wait at menu before selecting normal boot.
+#define CONFIG_BOOTMENU_WAIT 2500
 // Support int 14 serial port calls
 #define CONFIG_SERIAL 1
 // Support int 17 parallel port calls
 #define CONFIG_LPT 1
 // Support int 16 keyboard calls
 #define CONFIG_KEYBOARD 1
+// Support calling int155f on each keyboard event
+#define CONFIG_KBD_CALL_INT15_4F 1
+// Disable A20 on 16bit boot
+#define CONFIG_DISABLE_A20 0
+// Support for int15c2 mouse calls
+#define CONFIG_PS2_MOUSE 1
+// If the target machine has multiple independent root buses, the
+// extra buses may be specified here.
+#define CONFIG_PCI_ROOT1 0x00
+#define CONFIG_PCI_ROOT2 0x00
+// Support searching coreboot flash format.
+#define CONFIG_COREBOOT_FLASH 0
+// Support the lzma decompression algorighm.
+#define CONFIG_LZMA 1
 // Support finding and running option roms during post.
 #define CONFIG_OPTIONROMS 1
 // Set if option roms are already copied to 0xc0000-0xf0000
 #define CONFIG_OPTIONROMS_DEPLOYED 1
 // When option roms are not pre-deployed, SeaBIOS can copy an optionrom
 // from flash for up to 2 devices.
-#define OPTIONROM_BDF_1 0x0000
+#define OPTIONROM_VENDEV_1 0x00000000
 #define OPTIONROM_MEM_1 0x00000000
-#define OPTIONROM_BDF_2 0x0000
+#define OPTIONROM_VENDEV_2 0x00000000
 #define OPTIONROM_MEM_2 0x00000000
-// Support an interactive boot menu at end of post.
-#define CONFIG_BOOTMENU 1
 
 // Support generation of a PIR table in 0xf000 segment (for emulators)
 #define CONFIG_PIRTABLE 1
@@ -74,11 +88,16 @@
 #define CONFIG_ACPI 1
 // Support bios callbacks specific to via vgabios.
 #define CONFIG_VGAHOOKS 0
+// Support S3 resume handler.
+#define CONFIG_S3_RESUME 1
+// Run the vga rom during S3 resume.
+#define CONFIG_S3_RESUME_VGA_INIT 0
+// define it if the (emulated) hardware supports SMM mode
+#define CONFIG_USE_SMM 1
 // Maximum number of map entries in the e820 map
 #define CONFIG_MAX_E820 32
-
-/* define it if the (emulated) hardware supports SMM mode */
-#define CONFIG_USE_SMM 1
+// Space to reserve in f-segment for run-time built bios tables.
+#define CONFIG_MAX_BIOSTABLE 2048
 
 #define CONFIG_MAX_ATA_INTERFACES 4
 #define CONFIG_MAX_ATA_DEVICES  (CONFIG_MAX_ATA_INTERFACES*2)
@@ -95,8 +114,6 @@
 #define BUILD_AP_BOOT_ADDR        0x10000
 #define BUILD_BIOS_ADDR           0xf0000
 #define BUILD_BIOS_SIZE           0x10000
-// 64 KB used to copy the BIOS to shadow RAM
-#define BUILD_BIOS_TMP_ADDR       0x30000
 
 #define BUILD_APIC_ADDR           0xfee00000
 #define BUILD_IOAPIC_ADDR         0xfec00000
@@ -110,18 +127,18 @@
 #define SEG_BDA      0x0040
 #define SEG_BIOS     0xf000
 
-// Segment definitions in protected mode (see rombios32_gdt in romlayout.S)
-#define SEG32_MODE32_CS    (2 << 3)
-#define SEG32_MODE32_DS    (3 << 3)
-#define SEG32_MODE16_CS    (4 << 3)
-#define SEG32_MODE16_DS    (5 << 3)
-#define SEG32_MODE16BIG_CS (6 << 3)
-#define SEG32_MODE16BIG_DS (7 << 3)
+// Segment definitions in protected mode (see rombios32_gdt in misc.c)
+#define SEG32_MODE32_CS    (1 << 3)
+#define SEG32_MODE32_DS    (2 << 3)
+#define SEG32_MODE16_CS    (3 << 3)
+#define SEG32_MODE16_DS    (4 << 3)
+#define SEG32_MODE16BIG_CS (5 << 3)
+#define SEG32_MODE16BIG_DS (6 << 3)
 
 // Debugging levels.  If non-zero and CONFIG_DEBUG_LEVEL is greater
 // than the specified value, then the corresponding irq handler will
 // report every enter event.
-#define DEBUG_ISR_nmi 1
+#define DEBUG_ISR_02 1
 #define DEBUG_HDL_05 1
 #define DEBUG_ISR_08 20
 #define DEBUG_ISR_09 9
@@ -137,14 +154,13 @@
 #define DEBUG_HDL_18 1
 #define DEBUG_HDL_19 1
 #define DEBUG_HDL_1a 9
-#define DEBUG_ISR_1c 20
 #define DEBUG_HDL_40 1
 #define DEBUG_ISR_70 9
 #define DEBUG_ISR_74 9
 #define DEBUG_ISR_75 1
 #define DEBUG_ISR_76 10
-#define DEBUG_ISR_hwpic1 1
-#define DEBUG_ISR_hwpic2 1
+#define DEBUG_ISR_hwpic1 5
+#define DEBUG_ISR_hwpic2 5
 #define DEBUG_HDL_pnp 1
 
 #endif // config.h