Emergency fix: r5102 carried some local change that doesn't

[coreboot.git] / src / config / failovercalculation.lb

diff --git a/src/config/failovercalculation.lb b/src/config/failovercalculation.lb
index 7626289e2d63cd14433ec6705670fe2aa574cf37..c0b35fe010362a3cd7c34f9243b23d0152a90831 100644 (file)
--- a/src/config/failovercalculation.lb
+++ b/src/config/failovercalculation.lb
@@ -5,32 +5,21 @@
 if CONFIG_USE_FAILOVER_IMAGE
        default CONFIG_ROM_SECTION_SIZE   = CONFIG_FAILOVER_SIZE
        default CONFIG_ROM_SECTION_OFFSET = ( CONFIG_ROM_SIZE - CONFIG_FAILOVER_SIZE )
+       default CONFIG_ROM_IMAGE_SIZE = CONFIG_FAILOVER_SIZE
 else
     if CONFIG_USE_FALLBACK_IMAGE
        default CONFIG_ROM_SECTION_SIZE   = CONFIG_FALLBACK_SIZE
        default CONFIG_ROM_SECTION_OFFSET = ( CONFIG_ROM_SIZE - CONFIG_FALLBACK_SIZE - CONFIG_FAILOVER_SIZE )
     else
-       if CONFIG_CBFS
-               default CONFIG_ROM_SECTION_SIZE   = CONFIG_FALLBACK_SIZE
-               default CONFIG_ROM_SECTION_OFFSET = ( CONFIG_ROM_SIZE - CONFIG_FALLBACK_SIZE - CONFIG_FALLBACK_SIZE - CONFIG_FAILOVER_SIZE )
-       else
-               default CONFIG_ROM_SECTION_SIZE   = ( CONFIG_ROM_SIZE - CONFIG_FALLBACK_SIZE - CONFIG_FAILOVER_SIZE )
-               default CONFIG_ROM_SECTION_OFFSET = 0
-       end
+       default CONFIG_ROM_SECTION_SIZE   = CONFIG_FALLBACK_SIZE
+       default CONFIG_ROM_SECTION_OFFSET = ( CONFIG_ROM_SIZE - CONFIG_FALLBACK_SIZE - CONFIG_FALLBACK_SIZE - CONFIG_FAILOVER_SIZE )
     end
 end
 
-##
-## Compute the start location and size size of
-## The coreboot bootloader.
-##
-default CONFIG_PAYLOAD_SIZE            = ( CONFIG_ROM_SECTION_SIZE - CONFIG_ROM_IMAGE_SIZE )
-default CONFIG_ROM_PAYLOAD_START = (0xffffffff - CONFIG_ROM_SIZE + CONFIG_ROM_SECTION_OFFSET + 1)
-
 ##
 ## Compute where this copy of coreboot will start in the boot rom
 ##
-default CONFIG_ROMBASE      = ( CONFIG_ROM_PAYLOAD_START + CONFIG_PAYLOAD_SIZE )
+default CONFIG_ROMBASE      = (0xffffffff - CONFIG_ROM_SIZE + CONFIG_ROM_SECTION_OFFSET + 1)
 
 ##
 ## Compute a range of ROM that can cached to speed up coreboot,