This is (most of) the usb2 debug console code ripped out of

[coreboot.git] / src / config / Options.lb

diff --git a/src/config/Options.lb b/src/config/Options.lb
index 0b3c3acf716d0afd843ea521f5ccd59cabaa79ca..d1645cdcf6c2b8ceff10d2cd03a07ebc18c7fdb5 100644 (file)
--- a/src/config/Options.lb
+++ b/src/config/Options.lb
@@ -442,6 +442,11 @@ define CONFIG_CONSOLE_SERIAL8250
        export always
        comment "Log messages to 8250 uart based serial console"
 end
+define CONFIG_USBDEBUG_DIRECT
+       default 0
+       export always
+       comment "Log messages to ehci debug port console"
+end
 define DEFAULT_CONSOLE_LOGLEVEL
        default 7
        export always
@@ -999,6 +1004,12 @@ define CONFIG_PCI_64BIT_PREF_MEM
         comment "allow PCI device get 4G above Region as pref mem"
 end
 
+define CONFIG_AGESA
+       default 0
+       export always
+       comment "use AMD AGESA to init RAM instead of native code"
+end
+
 define CONFIG_VIDEO_MB
         default none
         export used