comment "Target C Compiler"
end
define HOSTCC
- default "$(CROSS_COMPILE)gcc"
+ default "gcc"
export always
comment "Host C Compiler"
end
+define CPU_OPT
+ default none
+ export used
+ comment "Additional per-cpu CFLAGS"
+end
define OBJCOPY
default "$(CROSS_COMPILE)objcopy"
export always
comment "Objcopy command"
end
define LINUXBIOS_VERSION
- default "1.1.0"
+ default "1.1.4"
export always
comment "LinuxBIOS version"
end
+define LINUXBIOS_EXTRA_VERSION
+ default ""
+ export used
+ comment "LinuxBIOS extra version"
+end
define LINUXBIOS_BUILD
default "$(shell date)"
export always
end
define LINUXBIOS_COMPILE_DOMAIN
- default ""
+ default "$(shell dnsdomainname)"
export always
comment "Build domain name"
end
export always
comment "Build assembler"
end
+define CONFIG_CHIP_CONFIGURE
+ default 0
+ export used
+ comment "Use new chip_configure method for configuring (non-pci) devices"
+end
###############################################
# ROM image options
###############################################
define HAVE_FALLBACK_BOOT
+ format "%d"
default 0
export always
comment "Set if fallback booting required"
end
define USE_FALLBACK_IMAGE
+<<<<<<< Options.lb
+ format "%d"
default 0
+=======
+ default 1
+>>>>>>> 1.23
export used
comment "Set to build a fallback image"
end
-define USE_NORMAL_IMAGE
- default {!USE_FALLBACK_IMAGE}
- export used
- comment "Set to build a normal image"
-end
define FALLBACK_SIZE
default 65536
format "0x%x"
comment "Default fallback image size"
end
define ROM_SIZE
- default 262144
+ default none
format "0x%x"
export used
comment "Size of your ROM"
comment "Default image size"
end
define ROM_SECTION_SIZE
- default FALLBACK_SIZE
+ default {FALLBACK_SIZE}
format "0x%x"
export used
comment "Default rom section size"
default {PAYLOAD_SIZE}
format "0x%x"
export always
- comment "Base of ROM"
+ comment "Base address of LinuxBIOS in ROM"
+end
+define _RESET
+ default {_ROMBASE}
+ format "0x%x"
+ export always
+ comment "Hardware reset vector address"
end
define STACK_SIZE
default 0x2000
comment "Default heap size"
end
define _RAMBASE
- default 0x00100000
+ default none
format "0x%x"
- export used
- comment "Base address of RAM"
+ export always
+ comment "Base address of LinuxBIOS in RAM"
end
define USE_CACHE_RAM
default 0
export always
comment "Size of cache when using it for temporary RAM"
end
+define XIP_ROM_BASE
+ default 0
+ format "0x%x"
+ export used
+ comment "Start address of area to cache during LinuxBIOS execution directly from ROM"
+end
+define XIP_ROM_SIZE
+ default 0
+ format "0x%x"
+ export used
+ comment "Size of area to cache during LinuxBIOS execution directly from ROM"
+end
define CONFIG_COMPRESS
default 1
export always
comment "Set for compressed image"
end
define CONFIG_UNCOMPRESSED
+ format "%d"
default {!CONFIG_COMPRESS}
export always
comment "Set for uncompressed image"
comment "Export CMOS option table"
end
define USE_OPTION_TABLE
+ format "%d"
default {HAVE_OPTION_TABLE && !USE_FALLBACK_IMAGE}
export always
comment "Use option table"
define CONFIG_CONSOLE_SERIAL8250
default 0
export always
- comment "Log messages to serial 8250 console"
+ comment "Log messages to 8250 uart based serial console"
end
-define SERIAL_CONSOLE
- default none
- export used
- comment "Log messages to serial console"
+define DEFAULT_CONSOLE_LOGLEVEL
+ default 7
+ export always
+ comment "Console will log at this level unless changed"
end
+
define MAXIMUM_CONSOLE_LOGLEVEL
- default 7
+ default 8
export always
- comment "Console will log at this level"
+ comment "Error messages up to this level can be printed"
end
+
define NO_POST
default none
export always
comment "Disable POST codes"
end
+
+define TTYS0_BASE
+ default 0x3f8
+ export always
+ comment "Base address for 8250 uart for the serial console"
+end
+
define TTYS0_BAUD
default 115200
export always
comment "Default baud rate for serial console"
end
-define NO_KEYBOARD
- default none
- export never
- comment "Set if we don't have a keyboard"
-end
+define TTYS0_LCS
+ default 0x3
+ export always
+ comment "Default flow control settings for the 8250 serial console uart"
+end
+
###############################################
# Mainboard options
###############################################
export always
comment "Vendor of mainboard"
end
-define FINAL_MAINBOARD_FIXUP
- default 0
+define CONFIG_SYS_CLK_FREQ
+ default none
export used
- comment "Do final mainboard fixups"
+ comment "System clock frequency in MHz"
end
+define CONFIG_KEYBOARD
+ default 0
+ export used
+ comment "Run PC keyboard enable code"
+end
+define CONFIG_LEGACY_VGABIOS
+ default 0
+ export used
+ comment "Support for legacy VGA BIOS"
+end
###############################################
# SMP options
###############################################
define CONFIG_SMP
- default none
+ default 0
export always
comment "Define if we support SMP"
end
-define SMP
- default none
- export always
- comment "Define if we support SMP"
+define CONFIG_MAX_CPUS
+ default 1
+ export always
+ comment "Maximum CPU count for this machine"
end
-define MAX_CPUS
- default 1
+define CONFIG_MAX_PHYSICAL_CPUS
+ default {CONFIG_MAX_CPUS}
export always
- comment "CPU count for this machine"
+ comment "Physical CPU count for this machine"
end
define CONFIG_LOGICAL_CPUS
- default 1
- export always
- comment "Logical CPU count for this machine"
-end
-define MAX_PHYSICAL_CPUS
- default 1
+ default 0
export always
- comment "Physical CPU count for this machine"
+ comment "Should multiple cpus per die be enabled?"
end
define HAVE_MP_TABLE
default none
# Boot options
###############################################
-define USE_ELF_BOOT
- default none
- export always
- comment "Use ELF boot loader"
-end
define CONFIG_IDE_STREAM
default 0
export always
comment "Increment value SMBUS"
end
-###############################################
-# SuperIO options
-###############################################
-
-define SIO_BASE
- default none
- export used
- comment "Superio base address"
-end
-define SIO_SYSTEM_CLK_INPUT
- default none
- export used
- comment "Superio CLK input default"
-end
-
###############################################
# Misc options
###############################################
export used
comment "Set to deal with memory hole"
end
-define ENABLE_FIXED_AND_VARIABLE_MTRRS
- default none
- export used
- comment "Enable fixed and variable mtrrs"
-end
-define START_CPU_SEG
- default 0xf0000
- format "0x%x"
- export always
- comment "Start CPU segment"
-end
define MAX_REBOOT_CNT
- default 2
+ default 3
export always
comment "Set maximum reboots"
end
-define DISABLE_WATCHDOG
- default {MAXIMUM_CONSOLE_LOGLEVEL >= 8}
- export used
- comment "Disable watchdog if we're doing lots of output"
-end
###############################################
# Misc device options
###############################################
define CONFIG_TSC_X86RDTSC_CALIBRATE_WITH_TIMER2
- default none
+ default 0
export used
- comment ""
+ comment "Use timer2 to callibrate the x86 time stamp counter"
end
define INTEL_PPRO_MTRR
default none
export always
comment ""
end
-define AMD8111_DEV
- default 0x3800
- format "0x%x"
- export used
- comment ""
-end
define CONFIG_UDELAY_TSC
default 0
export used
- comment ""
+ comment "Implement udelay with the x86 time stamp counter"
end
+###############################################
+# Board specific options
+###############################################
+
+###############################################
+# Options for motorola/sandpoint
+###############################################
+define CONFIG_SANDPOINT_ALTIMUS
+ default 0
+ export never
+ comment "Configure Sandpoint with Altimus PMC"
+end
+define CONFIG_SANDPOINT_TALUS
+ default 0
+ export never
+ comment "Configure Sandpoint with Talus PMC"
+end
+define CONFIG_SANDPOINT_UNITY
+ default 0
+ export never
+ comment "Configure Sandpoint with Unity PMC"
+end
+define CONFIG_SANDPOINT_VALIS
+ default 0
+ export never
+ comment "Configure Sandpoint with Valis PMC"
+end
+define CONFIG_SANDPOINT_GYRUS
+ default 0
+ export never
+ comment "Configure Sandpoint with Gyrus PMC"
+end
projects / coreboot.git / blobdiff