comment "Build compiler"
end
define COREBOOT_LINKER
- default "$(shell $(CC) -Wl,--version 2>&1 | grep version | tail -n 1)"
+ default "$(shell $(CC) -Wl,--version 2>&1 | grep \" ld\")"
export always
format "\"%s\""
comment "Build linker"
comment "Use stage 1 initialization code"
end
+define COREBOOT_V2
+ default 1
+ export always
+ comment "This is used by code to determine v2 vs v3"
+end
+
###############################################
# ROM image options
###############################################
###############################################
define DEBUG
- default 1
+ default 0
export always
- comment "Enable debugging code"
+ comment "Enable x86emu debugging code"
end
define CONFIG_CONSOLE_VGA
default 0
export always
comment "use printk instead of print in CAR stage code"
end
+define ASSEMBLER_DEBUG
+ default 0
+ export always
+ comment "Create disassembly files for debugging"
+end
-
###############################################
# Mainboard options
###############################################
export always
comment "Should multiple cpus per die be enabled?"
end
+define CONFIG_AP_IN_SIPI_WAIT
+ default 0
+ export always
+ comment "Should application processors go to SIPI wait state after initialization? (Required for Intel Core Duo)"
+end
define HAVE_MP_TABLE
default none
export used
# Boot options
###############################################
+define CONFIG_MULTIBOOT
+ default 1
+ export always
+ comment "Use Multiboot (rather than ELF boot notes) to boot the payload"
+end
define CONFIG_IDE_PAYLOAD
default 0
export always
export used
comment "Define if we have a PIRQ table"
end
+define PIRQ_ROUTE
+ default 0
+ export used
+ comment "Define if we have a PIRQ table and want routing IRQs"
+end
define IRQ_SLOT_COUNT
default none
export used
export used
comment "Have hard reset"
end
+define HAVE_SMI_HANDLER
+ default 0
+ export always
+ comment "Set, if the board needs an SMI handler"
+end
define MEMORY_HOLE
default none
export used
comment "enable mmconfig for pci conf"
end
+define MMCONF_BASE_ADDRESS
+ default none
+ format "0x%x"
+ export used
+ comment "enable mmconfig base address"
+end
+
define HW_MEM_HOLE_SIZEK
default 0
export always
comment "Init x86 ROMs on all PCI devices"
end
+define CONFIG_PCI_OPTION_ROM_RUN_YABEL
+ default 0
+ export used
+ comment "Use Yabel instead of old bios emulator"
+end
+
+define CONFIG_PCI_OPTION_ROM_RUN_VM86
+ default 0
+ export used
+ comment "Use Yabel instead of old bios emulator"
+end
+
define CONFIG_PCI_64BIT_PREF_MEM
default 0
export always
comment "use AMD MCT to init RAM instead of native code"
end
+define AMD_UCODE_PATCH_FILE
+ default none
+ export used
+ format "\"%s\""
+ comment "name of the microcode patch file"
+end
+
+define K8_MEM_BANK_B_ONLY
+ default 0
+ export always
+ comment "use AMD K8's memory bank B only to make a 64bit memory system and memory bank A is free, such as Filbert."
+end
+
define CONFIG_VIDEO_MB
default none
export used
comment "Integrated graphics with UMA has dynamic setup"
end
+define CONFIG_GFXUMA
+ default none
+ export used
+ comment "GFX UMA"
+end
+
+define HAVE_MAINBOARD_RESOURCES
+ default 0
+ export always
+ comment "Enable if the mainboard/chipset requires extra entries in the memory map"
+end
+
+define HAVE_LOW_TABLES
+ default 1
+ export always
+ comment "Enable if ACPI, PIRQ, MP tables are supposed to live in the low megabyte"
+end
+
+define HAVE_HIGH_TABLES
+ default 0
+ export always
+ comment "Enable if ACPI, PIRQ, MP tables are supposed to live at top of memory"
+end
+
define CONFIG_SPLASH_GRAPHIC
default 0
export used
# 4 for 1280x1024
end
+define CONFIG_PCIE_CONFIGSPACE_HOLE
+ default 0
+ export always
+ comment "Leave a hole for PCIe config space in the device allocator"
+end
+
###############################################
# Board specific options
###############################################