CBMEM high table memory manager.

[coreboot.git] / src / boot / hardwaremain.c

diff --git a/src/boot/hardwaremain.c b/src/boot/hardwaremain.c
index 6545183f5f269b5c80b7d3fa6c627834b9933dd5..5f5b0efb02b9185cfef764e2405eeb1017d3c527 100644 (file)
--- a/src/boot/hardwaremain.c
+++ b/src/boot/hardwaremain.c
@@ -25,25 +25,28 @@ it with the version available from LANL.
  * C Bootstrap code for the coreboot
  */
 
-
 #include <console/console.h>
 #include <version.h>
-#include <boot/tables.h>
 #include <device/device.h>
 #include <device/pci.h>
 #include <delay.h>
 #include <stdlib.h>
 #include <part/hard_reset.h>
 #include <part/init_timer.h>
+#include <boot/tables.h>
 #include <boot/elf.h>
-#include <romfs.h>
+#include <cbfs.h>
+#if CONFIG_HAVE_ACPI_RESUME
 #include <arch/acpi.h>
+#endif
+#if CONFIG_WRITE_HIGH_TABLES
+#include <cbmem.h>
+#endif
 
 /**
- * @brief Main function of the DRAM part of coreboot.
- *
- * Coreboot is divided into Pre-DRAM part and DRAM part. 
+ * @brief Main function of the RAM part of coreboot.
  *
+ * Coreboot is divided into Pre-RAM part and RAM part. 
  * 
  * Device Enumeration:
  *     In the dev_enumerate() phase, 
@@ -52,18 +55,15 @@ it with the version available from LANL.
 void hardwaremain(int boot_complete)
 {
        struct lb_memory *lb_mem;
-#if HAVE_ACPI_RESUME == 1
-       void *wake_vec;
-#endif
 
        post_code(0x80);
 
-       /* displayinit MUST PRECEDE ALL PRINTK! */
+       /* console_init() MUST PRECEDE ALL printk()! */
        console_init();
        
        post_code(0x39);
 
-       printk_notice("coreboot-%s%s %s %s...\n", 
+       printk(BIOS_NOTICE, "coreboot-%s%s %s %s...\n", 
                      coreboot_version, coreboot_extra_version, coreboot_build,
                      (boot_complete)?"rebooting":"booting");
 
@@ -89,42 +89,23 @@ void hardwaremain(int boot_complete)
        dev_initialize();
        post_code(0x89);
 
-#if HAVE_ACPI_RESUME == 1
-
-#if MEM_TRAIN_SEQ != 0
-       #error "So far it works on AMD and MEM_TRAIN_SEQ == 0"
-#endif
-
-#if _RAMBASE < 0x1F00000
-       #error "For ACPI RESUME you need to have _RAMBASE at least 31MB"
-       #error "Chipset support (S3_NVRAM_EARLY and ACPI_IS_WAKEUP_EARLY functions and memory ctrl)"
-       #error "And coreboot memory reserved in mainboard.c"
+#if CONFIG_WRITE_HIGH_TABLES == 1
+       cbmem_initialize();
 #endif
-       /* if we happen to be resuming find wakeup vector and jump to OS */
-       wake_vec = acpi_find_wakeup_vector();
-       if (wake_vec)
-               acpi_jump_to_wakeup(wake_vec);
+#if CONFIG_HAVE_ACPI_RESUME == 1
+       suspend_resume();
+       post_code(0x8a);
 #endif
 
        /* Now that we have collected all of our information
         * write our configuration tables.
         */
        lb_mem = write_tables();
-#if CONFIG_ROMFS == 1
-# if USE_FALLBACK_IMAGE == 1
-       void (*pl)(void) = romfs_load_payload(lb_mem, "fallback/payload");
-# else
-       void (*pl)(void) = romfs_load_payload(lb_mem, "normal/payload");
-# endif
-#endif
-
-#if CONFIG_FS_PAYLOAD == 1
-#warning "CONFIG_FS_PAYLOAD is deprecated."
-       filo(lb_mem);
+#if CONFIG_USE_FALLBACK_IMAGE == 1
+       cbfs_load_payload(lb_mem, "fallback/payload");
 #else
-#warning "elfboot will soon be deprecated."
-       elfboot(lb_mem);
+       cbfs_load_payload(lb_mem, "normal/payload");
 #endif
-       printk_err("Boot failed.\n");
+       printk(BIOS_ERR, "Boot failed.\n");
 }