tx_done <= '0';
wait until rising_edge(tx_new);
wait for 90 ns;
- tx_done <= '1';
- wait for 90 ns;
+ tx_done <= '1'; -- FIXME: why is this unresolved?
+ wait for 30 ns;
end process stub_uart;
reset_and_button : process
rx_data <= "00000000";
d_zeile <= "0000000";
d_spalte <= "0000000";
- tx_new <= '0';
tx_done <= '0';
rx_new <= '0';
+ d_char <= (others => '0');
wait for 90 ns;
sys_res_n <= '1';
btn_a <= '1';
wait for 15 ns;
btn_a <= '0';
- wait;
+ --wait;
+ wait for 1000 ns;
+ assert false report "test beendet" severity failure;
end process reset_and_button;
end architecture sim;