Add the coreboot config to CBFS

[coreboot.git] / src / arch / x86 / init / crt0_romcc_epilogue.inc

diff --git a/src/arch/x86/init/crt0_romcc_epilogue.inc b/src/arch/x86/init/crt0_romcc_epilogue.inc
index 3bd1b369924f6068fc0cd38224b8a52c90edb412..b19f9687e9b65cd3ce2f88541d2783f6af2484fa 100644 (file)
--- a/src/arch/x86/init/crt0_romcc_epilogue.inc
+++ b/src/arch/x86/init/crt0_romcc_epilogue.inc
@@ -5,11 +5,12 @@
  * modify it under the terms of the GNU General Public License as
  * published by the Free Software Foundation; version 2 of the License.
  */
+#include <cpu/x86/post_code.h>
 
        /* clear boot_complete flag */
        xorl    %ebp, %ebp
 __main:
-       post_code(0x11)
+       post_code(POST_PREPARE_RAMSTAGE)
        cld                     /* clear direction flag */
 
        movl    %ebp, %esi
@@ -20,7 +21,7 @@ __main:
        call copy_and_run
 
 .Lhlt:
-       post_code(0xee)
+       post_code(POST_DEAD_CODE)
        hlt
        jmp     .Lhlt