Fix coreboot updates

[coreboot.git] / src / arch / x86 / Makefile.inc

diff --git a/src/arch/x86/Makefile.inc b/src/arch/x86/Makefile.inc
old mode 100644 (file)
new mode 100755 (executable)
index bf2393c..50238c5
--- a/src/arch/x86/Makefile.inc
+++ b/src/arch/x86/Makefile.inc
@@ -61,11 +61,12 @@ prebuild-files = \
                $(CBFSTOOL) $@ add $(call extract_nth,1,$(file)) $(call extract_nth,2,$(file)) $(call extract_nth,3,$(file)) $(call extract_nth,4,$(file)); )
 prebuilt-files = $(foreach file,$(cbfs-files), $(call extract_nth,1,$(file)))
 
-$(obj)/coreboot.pre1: $(obj)/coreboot.bootblock $(prebuilt-files) $(CBFSTOOL)
+$(obj)/coreboot.pre1: $(obj)/coreboot.bootblock $$(prebuilt-files) $(CBFSTOOL)
        rm -f $@
        $(CBFSTOOL) $@ create $(CONFIG_COREBOOT_ROMSIZE_KB)K $(obj)/coreboot.bootblock
        $(prebuild-files)
 else
+.PHONY: $(obj)/coreboot.pre1
 $(obj)/coreboot.pre1: $(CBFSTOOL)
        mv $(obj)/coreboot.rom $@
 endif
@@ -98,6 +99,13 @@ ifeq ($(CONFIG_GEODE_VSA_FILE),y)
        $(OBJCOPY) --set-start 0x20 --adjust-vma 0x60000 -I binary -O elf32-i386 -B i386 $(CONFIG_VSA_FILENAME) $(obj)/vsa.o
        $(LD) -m elf_i386 -e 0x60020 --section-start .data=0x60000 $(obj)/vsa.o -o $(obj)/vsa.elf
        $(CBFSTOOL) $@.tmp add-stage $(obj)/vsa.elf vsa
+endif
+ifeq ($(CONFIG_INCLUDE_CONFIG_FILE),y)
+       @printf "    CONFIG     $(DOTCONFIG)\n"
+       if [ -f $(DOTCONFIG) ]; then \
+       echo "# This image was built using git revision" `git rev-parse HEAD` > $(obj)/config.tmp ; \
+       sed -e '/^#/d' -e '/^ *$$/d' $(DOTCONFIG) >> $(obj)/config.tmp ; \
+       $(CBFSTOOL) $@.tmp add $(obj)/config.tmp config raw; rm -f $(obj)/config.tmp ; fi
 endif
        mv $@.tmp $@
        @printf "    CBFSPRINT  $(subst $(obj)/,,$(@))\n\n"
@@ -173,18 +181,8 @@ endif
 crt0s = $(src)/arch/x86/init/prologue.inc
 ldscripts =
 ldscripts += $(src)/arch/x86/init/bootblock.ld
-ifeq ($(CONFIG_BIG_BOOTBLOCK),y)
-crt0s += $(src)/cpu/x86/16bit/entry16.inc
-ldscripts += $(src)/cpu/x86/16bit/entry16.lds
-endif
 crt0s += $(src)/cpu/x86/32bit/entry32.inc
 ldscripts += $(src)/cpu/x86/32bit/entry32.lds
-ifeq ($(CONFIG_BIG_BOOTBLOCK),y)
-crt0s += $(src)/cpu/x86/16bit/reset16.inc
-ldscripts += $(src)/cpu/x86/16bit/reset16.lds
-crt0s += $(src)/arch/x86/lib/id.inc
-ldscripts += $(src)/arch/x86/lib/id.lds
-endif
 
 crt0s += $(src)/cpu/x86/fpu_enable.inc
 ifeq ($(CONFIG_SSE),y)
@@ -213,11 +211,6 @@ ifeq ($(CONFIG_MMX),y)
 crt0s += $(src)/cpu/x86/mmx_disable.inc
 endif
 
-ifeq ($(CONFIG_BIG_BOOTBLOCK),y)
-crt0s += $(chipset_bootblock_inc)
-ldscripts += $(chipset_bootblock_lds)
-endif
-
 ifeq ($(CONFIG_ROMCC),y)
 crt0s += $(src)/arch/x86/init/crt0_romcc_epilogue.inc
 endif
@@ -240,7 +233,8 @@ $(obj)/mainboard/$(MAINBOARDDIR)/romstage.pre.inc: $(src)/mainboard/$(MAINBOARDD
 
 $(obj)/mainboard/$(MAINBOARDDIR)/romstage.inc: $(obj)/mainboard/$(MAINBOARDDIR)/romstage.pre.inc
        @printf "    POST       romstage.inc\n"
-       sed -e 's/\.rodata/.rom.data/g' -e 's/\.text/.section .rom.text/g' $^ > $@.tmp
+       sed -e 's/\.rodata/.rom.data/g' -e 's/\^\.text/.section .rom.text/g' \
+               -e 's/\^\.section \.text/.section .rom.text/g' $^ > $@.tmp
        mv $@.tmp $@
 endif
 
@@ -277,11 +271,7 @@ ifeq ($(CONFIG_HAVE_BUS_CONFIG),y)
 ramstage-srcs += src/mainboard/$(MAINBOARDDIR)/get_bus_conf.c
 endif
 
-ifeq ($(CONFIG_TINY_BOOTBLOCK),y)
 include $(src)/arch/x86/Makefile.bootblock.inc
-else
-include $(src)/arch/x86/Makefile.bigbootblock.inc
-endif
 
 seabios:
        $(MAKE) -C payloads/external/SeaBIOS -f Makefile.inc \