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Allow user to specify the size of a newly created cbfs image
[coreboot.git] / src / arch / i386 / Makefile.inc
diff --git a/src/arch/i386/Makefile.inc b/src/arch/i386/Makefile.inc
index c505740d85c1dabd07d2b545f459ac7f438c0a9f..e2f464d2853642e0a689cba20cb7670073b6f67f 100644 (file)
--- a/src/arch/i386/Makefile.inc
+++ b/src/arch/i386/Makefile.inc
@@ -8,46 +8,45 @@ subdirs-y += smp
 obj-$(CONFIG_HAVE_OPTION_TABLE) += ../../option_table.o
 
 ifdef POST_EVALUATION
-BOOTBLOCK_SIZE=65536
 
 #######################################################################
 # Build the final rom image
 
 $(obj)/coreboot.rom: $(obj)/coreboot.bootblock $(obj)/coreboot_ram $(CBFSTOOL)
-       $(Q)rm -f $@
-       $(Q)$(CBFSTOOL) $@ create $(shell expr 1024 \* $(CONFIG_COREBOOT_ROMSIZE_KB)) $(BOOTBLOCK_SIZE) $(obj)/coreboot.bootblock
-       $(Q)if [ -f fallback/coreboot_apc ]; \
+       rm -f $@
+       $(CBFSTOOL) $@ create $(CONFIG_COREBOOT_ROMSIZE_KB)K $(obj)/coreboot.bootblock
+       if [ -f fallback/coreboot_apc ]; \
        then \
-               $(Q) $(CBFSTOOL) $@ add-stage fallback/coreboot_apc fallback/coreboot_apc $(CBFS_COMPRESS_FLAG); \
+               $(CBFSTOOL) $@ add-stage fallback/coreboot_apc fallback/coreboot_apc $(CBFS_COMPRESS_FLAG); \
        fi
-       $(Q)$(CBFSTOOL) $@ add-stage  $(obj)/coreboot_ram fallback/coreboot_ram $(CBFS_COMPRESS_FLAG)
+       $(CBFSTOOL) $@ add-stage $(obj)/coreboot_ram fallback/coreboot_ram $(CBFS_COMPRESS_FLAG)
 ifeq ($(CONFIG_PAYLOAD_NONE),y)
-       $(Q)printf "    PAYLOAD    none (as specified by user)\n"
+       @printf "    PAYLOAD    none (as specified by user)\n"
 else
-       $(Q) printf "    PAYLOAD    $(CONFIG_FALLBACK_PAYLOAD_FILE) $(COMPRESSFLAG)\n"
-       $(Q)$(CBFSTOOL) ./build/coreboot.rom add-payload $(CONFIG_FALLBACK_PAYLOAD_FILE)  fallback/payload $(CBFS_COMPRESS_FLAG)
-ifeq ($(CONFIG_VGA_BIOS),y)
-       $(Q) printf "    VGABIOS    $(CONFIG_FALLBACK_VGA_BIOS_FILE) $(CONFIG_FALLBACK_VGA_BIOS_ID) $(COMPRESSFLAG)\n"
-       $(Q) $(CBFSTOOL) ./build/coreboot.rom add $(CONFIG_FALLBACK_VGA_BIOS_FILE) "pci$(CONFIG_FALLBACK_VGA_BIOS_ID).rom" optionrom 
+       @printf "    PAYLOAD    $(CONFIG_FALLBACK_PAYLOAD_FILE) $(CBFS_PAYLOAD_COMPRESS_FLAG)\n"
+       $(CBFSTOOL) $(obj)/coreboot.rom add-payload $(CONFIG_FALLBACK_PAYLOAD_FILE) fallback/payload $(CBFS_PAYLOAD_COMPRESS_FLAG)
 endif
-       $(Q) printf "    CBFSPRINT  ./build/coreboot.rom\n\n"
-       $(CBFSTOOL) build/coreboot.rom print
+ifeq ($(CONFIG_VGA_BIOS),y)
+       @printf "    VGABIOS    $(CONFIG_FALLBACK_VGA_BIOS_FILE) $(CONFIG_FALLBACK_VGA_BIOS_ID)\n"
+       $(CBFSTOOL) $(obj)/coreboot.rom add $(CONFIG_FALLBACK_VGA_BIOS_FILE) "pci$(CONFIG_FALLBACK_VGA_BIOS_ID).rom" optionrom
 endif
+       @printf "    CBFSPRINT  $(subst $(obj)/,,$(@))\n\n"
+       $(CBFSTOOL) $(obj)/coreboot.rom print
 
 
 #######################################################################
 # Build the bootblock
 
 $(obj)/coreboot.bootblock: $(obj)/coreboot
-       $(Q)printf "    OBJCOPY    $(subst $(obj)/,,$(@))\n"
-       $(Q)$(OBJCOPY) -O binary $< $@
+       @printf "    OBJCOPY    $(subst $(obj)/,,$(@))\n"
+       $(OBJCOPY) -O binary $< $@
 
 $(obj)/ldscript.ld: $(ldscripts) $(obj)/ldoptions
-       $(Q)printf 'INCLUDE "ldoptions"\n' > $@
-       $(Q)printf '$(foreach ldscript,$(ldscripts),INCLUDE "$(ldscript)"\n)' >> $@
+       printf 'INCLUDE "ldoptions"\n' > $@
+       printf '$(foreach ldscript,$(ldscripts),INCLUDE "$(ldscript:$(obj)/%=%)"\n)' >> $@
 
 $(obj)/crt0_includes.h: $(crt0s)
-       $(Q)printf '$(foreach crt0,$(obj)/config.h $(crt0s),#include "$(crt0)"\n)' > $@
+       printf '$(foreach crt0,config.h $(crt0s),#include "$(crt0:$(obj)/%=%)"\n)' > $@
 
 $(obj)/mainboard/$(MAINBOARDDIR)/crt0.o: $(obj)/mainboard/$(MAINBOARDDIR)/crt0.s
        $(CC) -I$(obj) -Wa,-acdlns -c -o $@ $<  > $(dir $@)/crt0.disasm
@@ -56,38 +55,37 @@ $(obj)/mainboard/$(MAINBOARDDIR)/crt0.s: $(src)/arch/i386/init/crt0.S.lb $(obj)/
        $(CC) -x assembler-with-cpp -DASSEMBLY -E -I$(src)/include -I$(src)/arch/i386/include -I$(obj) -include $(obj)/config.h -I. -I$(src) $< > $@.new && mv $@.new $@
 
 $(obj)/coreboot: $(initobjs) $(obj)/ldscript.ld
-       $(Q)printf "    LINK       $(subst $(obj)/,,$(@))\n"
-       $(Q)$(CC) -nostdlib -nostartfiles -static -o $@ -L$(obj) -T $(obj)/ldscript.ld $(initobjs)
-       $(Q)$(NM) -n $(obj)/coreboot | sort > $(obj)/coreboot.map
+       @printf "    LINK       $(subst $(obj)/,,$(@))\n"
+       $(CC) -nostdlib -nostartfiles -static -o $@ -L$(obj) -T $(obj)/ldscript.ld $(initobjs)
+       $(NM) -n $(obj)/coreboot | sort > $(obj)/coreboot.map
 
 #######################################################################
 # i386 specific tools
 
 $(obj)/option_table.h $(obj)/option_table.c: $(obj)/build_opt_tbl $(top)/src/mainboard/$(MAINBOARDDIR)/cmos.layout
-       $(Q)printf "    OPTION     $(subst $(obj)/,,$(@))\n"
-       $(Q)$(obj)/build_opt_tbl --config $(top)/src/mainboard/$(MAINBOARDDIR)/cmos.layout --header $(obj)/option_table.h --option $(obj)/option_table.c
+       @printf "    OPTION     $(subst $(obj)/,,$(@))\n"
+       $(obj)/build_opt_tbl --config $(top)/src/mainboard/$(MAINBOARDDIR)/cmos.layout --header $(obj)/option_table.h --option $(obj)/option_table.c
 
-$(obj)/build_opt_tbl: $(top)/util/options/build_opt_tbl.c $(top)/src/include/pc80/mc146818rtc.h $(top)/src/include/boot/coreboot_tables.h
-       $(Q)printf "    HOSTCC     $(subst $(obj)/,,$(@))\n"
-       $(Q)$(HOSTCC) $(HOSTCFLAGS) -include $(obj)/config.h $< -o $@
+$(obj)/build_opt_tbl: $(top)/util/options/build_opt_tbl.c $(top)/src/include/pc80/mc146818rtc.h $(top)/src/include/boot/coreboot_tables.h $(obj)/config.h
+       @printf "    HOSTCC     $(subst $(obj)/,,$(@))\n"
+       $(HOSTCC) $(HOSTCFLAGS) -include $(obj)/config.h $< -o $@
 
 #######################################################################
 # Build the coreboot_ram (stage 2)
 
 $(obj)/coreboot_ram: $(obj)/coreboot_ram.o $(src)/config/coreboot_ram.ld #ldoptions
-       $(Q)printf "    CC         $(subst $(obj)/,,$(@))\n"
-       $(Q)$(CC) -nostdlib -nostartfiles -static -o $@ -L$(obj) -T $(src)/config/coreboot_ram.ld $(obj)/coreboot_ram.o
-       $(Q)$(NM) -n $(obj)/coreboot_ram | sort > $(obj)/coreboot_ram.map
+       @printf "    CC         $(subst $(obj)/,,$(@))\n"
+       $(CC) -nostdlib -nostartfiles -static -o $@ -L$(obj) -T $(src)/config/coreboot_ram.ld $(obj)/coreboot_ram.o
+       $(NM) -n $(obj)/coreboot_ram | sort > $(obj)/coreboot_ram.map
 
 $(obj)/coreboot_ram.o: $(obj)/arch/i386/lib/c_start.o $(drivers) $(obj)/coreboot.a $(LIBGCC_FILE_NAME)
-       $(Q)printf "    CC         $(subst $(obj)/,,$(@))\n"
-       $(Q)$(CC) -nostdlib -r -o $@ $(obj)/arch/i386/lib/c_start.o $(drivers) -Wl,-\( $(obj)/coreboot.a $(LIBGCC_FILE_NAME) -Wl,-\)
+       @printf "    CC         $(subst $(obj)/,,$(@))\n"
+       $(CC) -nostdlib -r -o $@ $(obj)/arch/i386/lib/c_start.o $(drivers) -Wl,-\( $(obj)/coreboot.a $(LIBGCC_FILE_NAME) -Wl,-\)
 
 $(obj)/coreboot.a: $(objs)
-       $(Q)printf "    AR         $(subst $(obj)/,,$(@))\n"
-       $(Q)rm -f $(obj)/coreboot.a
-       $(Q)$(AR) cr $(obj)/coreboot.a $(objs)
-
+       @printf "    AR         $(subst $(obj)/,,$(@))\n"
+       rm -f $(obj)/coreboot.a
+       $(AR) cr $(obj)/coreboot.a $(objs)
 
 #######################################################################
 # done
my coreboot WIP stuff (asus m5a99x-evo board)