0x1 // OEM Revision
)
{
+
+
+/****************************************************************
+ * Debugging
+ ****************************************************************/
+
Scope (\)
{
/* Debug Output */
}
}
- /* PCI Bus definition */
+
+/****************************************************************
+ * PCI Bus definition
+ ****************************************************************/
+
Scope(\_SB) {
Device(PCI0) {
Name (_HID, EisaId ("PNP0A03"))
#define prt_slot3(nr) prt_slot(nr, LNKC, LNKD, LNKA, LNKB)
prt_slot0(0x0000),
/* Device 1 is power mgmt device, and can only use irq 9 */
- Package() { 0x0001ffff, 0, 0, 9 },
+ Package() { 0x0001ffff, 0, LNKS, 0 },
Package() { 0x0001ffff, 1, LNKB, 0 },
Package() { 0x0001ffff, 2, LNKC, 0 },
Package() { 0x0001ffff, 3, LNKD, 0 },
B0EJ, 32,
}
-#define hotplug_slot(name, nr) \
- Device (S##name) { \
- Name (_ADR, nr##0000) \
- Method (_EJ0,1) { \
- Store(ShiftLeft(1, nr), B0EJ) \
- Return (0x0) \
- } \
- Name (_SUN, name) \
+ OperationRegion(RMVC, SystemIO, 0xae0c, 0x04)
+ Field(RMVC, DWordAcc, NoLock, WriteAsZeros)
+ {
+ PCRM, 32,
}
- hotplug_slot(1, 0x0001)
- hotplug_slot(2, 0x0002)
- hotplug_slot(3, 0x0003)
- hotplug_slot(4, 0x0004)
- hotplug_slot(5, 0x0005)
- hotplug_slot(6, 0x0006)
- hotplug_slot(7, 0x0007)
- hotplug_slot(8, 0x0008)
- hotplug_slot(9, 0x0009)
- hotplug_slot(10, 0x000a)
- hotplug_slot(11, 0x000b)
- hotplug_slot(12, 0x000c)
- hotplug_slot(13, 0x000d)
- hotplug_slot(14, 0x000e)
- hotplug_slot(15, 0x000f)
- hotplug_slot(16, 0x0010)
- hotplug_slot(17, 0x0011)
- hotplug_slot(18, 0x0012)
- hotplug_slot(19, 0x0013)
- hotplug_slot(20, 0x0014)
- hotplug_slot(21, 0x0015)
- hotplug_slot(22, 0x0016)
- hotplug_slot(23, 0x0017)
- hotplug_slot(24, 0x0018)
- hotplug_slot(25, 0x0019)
- hotplug_slot(26, 0x001a)
- hotplug_slot(27, 0x001b)
- hotplug_slot(28, 0x001c)
- hotplug_slot(29, 0x001d)
- hotplug_slot(30, 0x001e)
- hotplug_slot(31, 0x001f)
-
Name (_CRS, ResourceTemplate ()
{
WordBusNumber (ResourceProducer, MinFixed, MaxFixed, PosDecode,
,, , AddressRangeMemory, TypeStatic)
})
}
+ }
+
+/****************************************************************
+ * HPET
+ ****************************************************************/
+
+ Scope(\_SB) {
Device(HPET) {
Name(_HID, EISAID("PNP0103"))
Name(_UID, 0)
}
}
+
+/****************************************************************
+ * VGA
+ ****************************************************************/
+
Scope(\_SB.PCI0) {
Device (VGA) {
Name (_ADR, 0x00020000)
+ OperationRegion(PCIC, PCI_Config, Zero, 0x4)
+ Field(PCIC, DWordAcc, NoLock, Preserve) {
+ VEND, 32
+ }
Method (_S1D, 0, NotSerialized)
{
Return (0x00)
}
Method (_S3D, 0, NotSerialized)
{
- Return (0x00)
+ If (LEqual(VEND, 0x1001b36)) {
+ Return (0x03) // QXL
+ } Else {
+ Return (0x00)
+ }
}
+ Method(_RMV) { Return (0x00) }
}
+ }
- /* PIIX3 ISA bridge */
+
+/****************************************************************
+ * PIIX3 ISA bridge
+ ****************************************************************/
+
+ Scope(\_SB.PCI0) {
Device (ISA) {
Name (_ADR, 0x00010000)
+ Method(_RMV) { Return (0x00) }
/* PIIX PCI to ISA irq remapping */
OperationRegion (P40C, PCI_Config, 0x60, 0x04)
+ }
+ }
+
+/****************************************************************
+ * SuperIO devices (kbd, mouse, etc.)
+ ****************************************************************/
+
+ Scope(\_SB.PCI0.ISA) {
/* Real-time clock */
Device (RTC)
{
Return (BUF0)
}
}
- }
+ }
+
- /* PIIX4 PM */
+/****************************************************************
+ * PIIX4 PM
+ ****************************************************************/
+
+ Scope(\_SB.PCI0) {
Device (PX13) {
Name (_ADR, 0x00010003)
}
}
- /* PCI IRQs */
+
+/****************************************************************
+ * PCI hotplug
+ ****************************************************************/
+
+ Scope(\_SB.PCI0) {
+ /* Methods called by bulk generated PCI devices below */
+ Method (PRMV, 1, NotSerialized) {
+ // _RMV method - check if device can be removed
+ If (And(\_SB.PCI0.PCRM, ShiftLeft(1, Arg0))) {
+ Return (0x1)
+ }
+ Return (0x0)
+ }
+
+#define gen_pci_device(slot) \
+ Device(SL##slot) { \
+ Name (_ADR, 0x##slot##0000) \
+ Method (_RMV) { Return (PRMV(0x##slot)) } \
+ Name (_SUN, 0x##slot) \
+ }
+
+ /* VGA (slot 1) and ISA bus (slot 2) defined above */
+ gen_pci_device(03)
+ gen_pci_device(04)
+ gen_pci_device(05)
+ gen_pci_device(06)
+ gen_pci_device(07)
+ gen_pci_device(08)
+ gen_pci_device(09)
+ gen_pci_device(0a)
+ gen_pci_device(0b)
+ gen_pci_device(0c)
+ gen_pci_device(0d)
+ gen_pci_device(0e)
+ gen_pci_device(0f)
+ gen_pci_device(10)
+ gen_pci_device(11)
+ gen_pci_device(12)
+ gen_pci_device(13)
+ gen_pci_device(14)
+ gen_pci_device(15)
+ gen_pci_device(16)
+ gen_pci_device(17)
+ gen_pci_device(18)
+ gen_pci_device(19)
+ gen_pci_device(1a)
+ gen_pci_device(1b)
+ gen_pci_device(1c)
+ gen_pci_device(1d)
+ gen_pci_device(1e)
+ gen_pci_device(1f)
+
+ /* Methods called by bulk generated hotplug devices below */
+ Method (PCEJ, 1, NotSerialized) {
+ // _EJ0 method - eject callback
+ Store(ShiftLeft(1, Arg0), B0EJ)
+ Return (0x0)
+ }
+
+ /* Bulk generated PCI hotplug devices */
+#define hotplug_slot(slot) \
+ Device (S##slot) { \
+ Name (_ADR, 0x##slot##0000) \
+ Method (_EJ0, 1) { Return(PCEJ(0x##slot)) } \
+ Name (_SUN, 0x##slot) \
+ }
+
+ hotplug_slot(01)
+ hotplug_slot(02)
+ hotplug_slot(03)
+ hotplug_slot(04)
+ hotplug_slot(05)
+ hotplug_slot(06)
+ hotplug_slot(07)
+ hotplug_slot(08)
+ hotplug_slot(09)
+ hotplug_slot(0a)
+ hotplug_slot(0b)
+ hotplug_slot(0c)
+ hotplug_slot(0d)
+ hotplug_slot(0e)
+ hotplug_slot(0f)
+ hotplug_slot(10)
+ hotplug_slot(11)
+ hotplug_slot(12)
+ hotplug_slot(13)
+ hotplug_slot(14)
+ hotplug_slot(15)
+ hotplug_slot(16)
+ hotplug_slot(17)
+ hotplug_slot(18)
+ hotplug_slot(19)
+ hotplug_slot(1a)
+ hotplug_slot(1b)
+ hotplug_slot(1c)
+ hotplug_slot(1d)
+ hotplug_slot(1e)
+ hotplug_slot(1f)
+
+ /* PCI hotplug notify method */
+ Method(PCNF, 0) {
+ // Local0 = iterator
+ Store (Zero, Local0)
+ While (LLess(Local0, 31)) {
+ Increment(Local0)
+ If (And(PCIU, ShiftLeft(1, Local0))) {
+ PCNT(Local0, 1)
+ }
+ If (And(PCID, ShiftLeft(1, Local0))) {
+ PCNT(Local0, 3)
+ }
+ }
+ Return(One)
+ }
+
+#define gen_pci_hotplug(slot) \
+ If (LEqual(Arg0, 0x##slot)) { Notify(S##slot, Arg1) }
+
+ Method(PCNT, 2) {
+ gen_pci_hotplug(01)
+ gen_pci_hotplug(02)
+ gen_pci_hotplug(03)
+ gen_pci_hotplug(04)
+ gen_pci_hotplug(05)
+ gen_pci_hotplug(06)
+ gen_pci_hotplug(07)
+ gen_pci_hotplug(08)
+ gen_pci_hotplug(09)
+ gen_pci_hotplug(0a)
+ gen_pci_hotplug(0b)
+ gen_pci_hotplug(0c)
+ gen_pci_hotplug(0d)
+ gen_pci_hotplug(0e)
+ gen_pci_hotplug(0f)
+ gen_pci_hotplug(10)
+ gen_pci_hotplug(11)
+ gen_pci_hotplug(12)
+ gen_pci_hotplug(13)
+ gen_pci_hotplug(14)
+ gen_pci_hotplug(15)
+ gen_pci_hotplug(16)
+ gen_pci_hotplug(17)
+ gen_pci_hotplug(18)
+ gen_pci_hotplug(19)
+ gen_pci_hotplug(1a)
+ gen_pci_hotplug(1b)
+ gen_pci_hotplug(1c)
+ gen_pci_hotplug(1d)
+ gen_pci_hotplug(1e)
+ gen_pci_hotplug(1f)
+ }
+ }
+
+
+/****************************************************************
+ * PCI IRQs
+ ****************************************************************/
+
Scope(\_SB) {
Field (\_SB.PCI0.ISA.P40C, ByteAcc, NoLock, Preserve)
{
Store (TMP, PRQ3)
}
}
+ Device(LNKS){
+ Name(_HID, EISAID("PNP0C0F")) // PCI interrupt link
+ Name(_UID, 5)
+ Name(_PRS, ResourceTemplate(){
+ Interrupt (, Level, ActiveHigh, Shared)
+ { 9 }
+ })
+ Method (_STA, 0, NotSerialized)
+ {
+ Store (0x0B, Local0)
+ If (And (0x80, PRQ0, Local1))
+ {
+ Store (0x09, Local0)
+ }
+ Return (Local0)
+ }
+ Method (_DIS, 0, NotSerialized)
+ {
+ Or (PRQ0, 0x80, PRQ0)
+ }
+ Method (_CRS, 0, NotSerialized)
+ {
+ Name (PRR0, ResourceTemplate ()
+ {
+ Interrupt (, Level, ActiveHigh, Shared)
+ {9}
+ })
+ CreateDWordField (PRR0, 0x05, TMP)
+ Store (PRQ0, Local0)
+ If (LLess (Local0, 0x80))
+ {
+ Store (Local0, TMP)
+ }
+ Else
+ {
+ Store (Zero, TMP)
+ }
+ Return (PRR0)
+ }
+ }
}
+
+/****************************************************************
+ * Suspend
+ ****************************************************************/
+
/*
* S3 (suspend-to-ram), S4 (suspend-to-disk) and S5 (power-off) type codes:
* must match piix4 emulation.
Zero /* reserved */
})
- /* CPU hotplug */
+
+/****************************************************************
+ * CPU hotplug
+ ****************************************************************/
+
Scope(\_SB) {
/* Objects filled in by run-time generated SSDT */
External(NTFY, MethodObj)
}
}
+
+/****************************************************************
+ * General purpose events
+ ****************************************************************/
+
Scope (\_GPE)
{
Name(_HID, "ACPI0006")
Method(_L00) {
Return(0x01)
}
-
-#define gen_pci_hotplug(nr) \
- If (And(\_SB.PCI0.PCIU, ShiftLeft(1, nr))) { \
- Notify(\_SB.PCI0.S##nr, 1) \
- } \
- If (And(\_SB.PCI0.PCID, ShiftLeft(1, nr))) { \
- Notify(\_SB.PCI0.S##nr, 3) \
- }
-
Method(_L01) {
- gen_pci_hotplug(1)
- gen_pci_hotplug(2)
- gen_pci_hotplug(3)
- gen_pci_hotplug(4)
- gen_pci_hotplug(5)
- gen_pci_hotplug(6)
- gen_pci_hotplug(7)
- gen_pci_hotplug(8)
- gen_pci_hotplug(9)
- gen_pci_hotplug(10)
- gen_pci_hotplug(11)
- gen_pci_hotplug(12)
- gen_pci_hotplug(13)
- gen_pci_hotplug(14)
- gen_pci_hotplug(15)
- gen_pci_hotplug(16)
- gen_pci_hotplug(17)
- gen_pci_hotplug(18)
- gen_pci_hotplug(19)
- gen_pci_hotplug(20)
- gen_pci_hotplug(21)
- gen_pci_hotplug(22)
- gen_pci_hotplug(23)
- gen_pci_hotplug(24)
- gen_pci_hotplug(25)
- gen_pci_hotplug(26)
- gen_pci_hotplug(27)
- gen_pci_hotplug(28)
- gen_pci_hotplug(29)
- gen_pci_hotplug(30)
- gen_pci_hotplug(31)
-
- Return (0x01)
-
+ // PCI hotplug event
+ Return(\_SB.PCI0.PCNF())
}
Method(_L02) {
// CPU hotplug event
Return(0x01)
}
}
-
}
projects / seabios.git / blobdiff