SHELL := bash
+VPATH := .:ps2:textmode_vga:textmode_vga/mjl_stratix
MPWD := $(shell pwd)
D_BEHSIM := $(MPWD)/../sim/beh
HN := $(shell hostname)
TILABHOSTS := $(shell echo ti{1..9}) apps1
+ifeq ($(findstring $(HN), $(TILABHOSTS)),$(HN))
+QUMACRO := unset LS_COLORS; cd $(QUARTUS); export LD_LIBRARY_PATH=/opt/quartus/quartus/linux64; export LM_LICENSE_FILE=26888@quartus;
+else
+QUMACRO := unset LS_COLORS; cd $(QUARTUS);
+endif
+
WORK := work
+# o source files der module
# o reihenfolge ist wichtig
# o keine testbechnes hier angeben
-BEH_IFILES = gen_pkg alu
+SRCFILES := alu parser scanner display sp_ram history uart_tx uart_rx
+
+# o files der packages
+# o keine testbechnes hier angeben
+PKGFILES = math_pkg gen_pkg
+PKGFILES += textmode_vga/textmode_vga_platform_dependent_pkg
+PKGFILES += textmode_vga/textmode_vga_pkg
+PKGFILES += textmode_vga/font_pkg
+PKGFILES += textmode_vga/textmode_vga_component_pkg
+
+BEH_IFILES = $(PKGFILES) $(SRCFILES)
BEH_IFILES := $(strip $(BEH_IFILES))
-# o keine testbenches hier angeben
-# o beachte, dass sich viele files schon in dem VHO file befinden -- es muessen eigentlich nur
-# abhaengigkeiten fuer die testbenches angegeben werden
-POST_IFILES = gen_pkg
+POST_IFILES = $(PKGFILES)
POST_IFILES := $(strip $(POST_IFILES))
+POST_SRC = $(SRCFILES)
+
+
#virtuelle targets fuer behsim: weil wir sowas wie ein objectfile von vcom nicht bekommen. bessere ideen sind willkommen
-BEH_VTARGETS := $(foreach n, $(BEH_IFILES), $(D_BEHSIM)/$(WORK)/$(n)/_primary.dat)
+BEH_VTARGETS := $(foreach n, $(notdir $(BEH_IFILES)), $(D_BEHSIM)/$(WORK)/$(n)/_primary.dat)
+
+#virtuelle targets fuer packagefiles der postsim
+POST_VTARGETS := $(foreach n, $(notdir $(POST_IFILES)), $(D_POSTSIM)/$(WORK)/$(n)/_primary.dat)
-#virtuelle targets fuer postsim
-POST_VTARGETS := $(foreach n, $(POST_IFILES), $(D_POSTSIM)/$(WORK)/$(n)/_primary.dat)
+#virtuelle targets fuer sourcefiles der postsim
+POST_SRC_VTARGETS := $(foreach n, $(POST_SRC), $(n).vhd)
all: behsim
vsim "work.$@_tb(sim)" -f /dev/null -do $(MPWD)/$@_tb.do
#postsim
-postsim: $(POST_VHO) $(D_POSTSIM)/modelsim.ini $(POST_VTARGETS)
+postsim: $(POST_VHO) $(POST_SDO)
$(D_POSTSIM)/modelsim.ini:
@echo " INIT for post-layout simulation"
vlib work > /dev/null ; \
vmap work work > /dev/null ;
-$(D_POSTSIM)/$(WORK)/%/_primary.dat: %.vhd $(D_POSTSIM)/modelsim.ini
+$(D_POSTSIM)/$(WORK)/%/_primary.dat: %.vhd
@echo " CC $<"
@cd $(D_POSTSIM); \
vcom -work $(WORK) $(MPWD)/$<
-post_%: $(D_POSTSIM)/$(WORK)/post_%_tb/_primary.dat post_%_tb.do postsim $(POST_SDO)
+post_%: postsim $(D_POSTSIM)/$(WORK)/post_%_tb/_primary.dat post_%_tb.do
cd $(D_POSTSIM); \
vsim "work.$@_tb(sim)" -sdftyp /$(POST_SDO_INST)=$(POST_SDO) -f /dev/null -do $(MPWD)/$@_tb.do
-$(QUARTUS):
+$(QUARTUS): $(D_POSTSIM)/modelsim.ini
@echo -n " Quartus generate project"
ifeq ($(findstring $(HN), $(TILABHOSTS)),$(HN))
@echo "(@tilab)"
endif
#TODO: more targets plz...
-$(POST_VHO) $(POST_SDO): $(QUARTUS) postsim
+$(POST_VHO) $(POST_SDO): $(QUARTUS) $(POST_VTARGETS) $(POST_SRC_VTARGETS)
@echo " Quartus analysis & synthesis"
- @unset LS_COLORS; cd $(QUARTUS); \
- quartus_map $(QUOPT)
+ @$(QUMACRO) quartus_map $(QUOPT) | tee $(MPWD)/quartusmap.tmp
@echo " Quartus fitter"
- @unset LS_COLORS; cd $(QUARTUS); \
- quartus_fit $(QUOPT)
+ @$(QUMACRO) quartus_fit $(QUOPT)
@echo " Quartus assembler"
- @unset LS_COLORS; cd $(QUARTUS); \
- quartus_asm $(QUOPT)
+ @$(QUMACRO) quartus_asm $(QUOPT)
@echo " Quartus timing analyzer"
- @unset LS_COLORS; cd $(QUARTUS); \
- quartus_tan $(QUOPT) --timing_analysis_only
+ @$(QUMACRO) quartus_tan $(QUOPT) --timing_analysis_only | tee $(MPWD)/quartustan.tmp
@echo " Quartus EDA netlist writer"
- @unset LS_COLORS; cd $(QUARTUS); \
- quartus_eda $(QUOPT)
+ @$(QUMACRO) quartus_eda $(QUOPT)
#not nice atm :/
@echo " CC $(POST_VHO)"
@cd $(D_POSTSIM); \
vcom -work $(WORK) $(POST_VHO)
+ @echo -n " INFO logic cells: "
+ @grep 'logic cells' quartusmap.tmp | awk ' { print $$3 } '
+ @grep 'Fmax ' quartustan.tmp | sed -e 's/ / /g' -e 's/Info/INFO/g' -e 's/:/ /g'
+ @rm quartus*.tmp
.PHONY: clean
clean: